diff mbox

[U-Boot,v2,2/3] LS1046AQDS: Add NOR Secure Boot Target

Message ID 1477513031-29292-3-git-send-email-sumit.garg@nxp.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

Sumit Garg Oct. 26, 2016, 8:17 p.m. UTC
Add NOR secure boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
---

Changes in v2:
Split patches logically from 2 to 3.

 board/freescale/ls1046aqds/MAINTAINERS   |  4 ++++
 board/freescale/ls1046aqds/ls1046aqds.c  | 18 ++++++++++++++++++
 configs/ls1046aqds_SECURE_BOOT_defconfig | 29 +++++++++++++++++++++++++++++
 3 files changed, 51 insertions(+)
 create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig

Comments

York Sun Nov. 14, 2016, 5:53 p.m. UTC | #1
On 10/26/2016 03:47 AM, Sumit Garg wrote:
> Add NOR secure boot target. Also enable sec init.
>
> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
> Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
> ---
>
> Changes in v2:
> Split patches logically from 2 to 3.
>
>  board/freescale/ls1046aqds/MAINTAINERS   |  4 ++++
>  board/freescale/ls1046aqds/ls1046aqds.c  | 18 ++++++++++++++++++
>  configs/ls1046aqds_SECURE_BOOT_defconfig | 29 +++++++++++++++++++++++++++++
>  3 files changed, 51 insertions(+)
>  create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig
>
> diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS
> index b4549ae..6737d55 100644
> --- a/board/freescale/ls1046aqds/MAINTAINERS
> +++ b/board/freescale/ls1046aqds/MAINTAINERS
> @@ -8,3 +8,7 @@ F:	configs/ls1046aqds_nand_defconfig
>  F:	configs/ls1046aqds_sdcard_ifc_defconfig
>  F:	configs/ls1046aqds_sdcard_qspi_defconfig
>  F:	configs/ls1046aqds_qspi_defconfig
> +
> +M:	Sumit Garg <sumit.garg@nxp.com>
> +S:	Maintained
> +F:	configs/ls1046aqds_SECURE_BOOT_defconfig
> diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
> index 8c18538..a418590 100644
> --- a/board/freescale/ls1046aqds/ls1046aqds.c
> +++ b/board/freescale/ls1046aqds/ls1046aqds.c
> @@ -20,6 +20,7 @@
>  #include <fsl_csu.h>
>  #include <fsl_esdhc.h>
>  #include <fsl_ifc.h>
> +#include <fsl_sec.h>
>  #include <spl.h>
>
>  #include "../common/vid.h"
> @@ -242,6 +243,23 @@ int board_init(void)
>  	if (adjust_vdd(0))
>  		printf("Warning: Adjusting core voltage failed.\n");
>
> +#ifdef CONFIG_SECURE_BOOT
> +	/* In case of Secure Boot, the IBR configures the SMMU
> +	 * to allow only Secure transactions.
> +	 * SMMU must be reset in bypass mode.
> +	 * Set the ClientPD bit and Clear the USFCFG Bit
> +	 */

Multiple-line comment in wrong format. You just fixed some in your first 
patch.

York
Sumit Garg Nov. 15, 2016, 4:50 a.m. UTC | #2
> -----Original Message-----
> From: york sun
> Sent: Monday, November 14, 2016 11:23 PM
> To: Sumit Garg <sumit.garg@nxp.com>; u-boot@lists.denx.de
> Cc: Ruchika Gupta <ruchika.gupta@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; Vini Pillai <vinitha.pillai@nxp.com>
> Subject: Re: [PATCH v2 2/3] LS1046AQDS: Add NOR Secure Boot Target
> 
> On 10/26/2016 03:47 AM, Sumit Garg wrote:
> > Add NOR secure boot target. Also enable sec init.
> >
> > Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
> > Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
> > ---
> >
> > Changes in v2:
> > Split patches logically from 2 to 3.
> >
> >  board/freescale/ls1046aqds/MAINTAINERS   |  4 ++++
> >  board/freescale/ls1046aqds/ls1046aqds.c  | 18 ++++++++++++++++++
> > configs/ls1046aqds_SECURE_BOOT_defconfig | 29
> > +++++++++++++++++++++++++++++
> >  3 files changed, 51 insertions(+)
> >  create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig
> >
> > diff --git a/board/freescale/ls1046aqds/MAINTAINERS
> > b/board/freescale/ls1046aqds/MAINTAINERS
> > index b4549ae..6737d55 100644
> > --- a/board/freescale/ls1046aqds/MAINTAINERS
> > +++ b/board/freescale/ls1046aqds/MAINTAINERS
> > @@ -8,3 +8,7 @@ F:	configs/ls1046aqds_nand_defconfig
> >  F:	configs/ls1046aqds_sdcard_ifc_defconfig
> >  F:	configs/ls1046aqds_sdcard_qspi_defconfig
> >  F:	configs/ls1046aqds_qspi_defconfig
> > +
> > +M:	Sumit Garg <sumit.garg@nxp.com>
> > +S:	Maintained
> > +F:	configs/ls1046aqds_SECURE_BOOT_defconfig
> > diff --git a/board/freescale/ls1046aqds/ls1046aqds.c
> > b/board/freescale/ls1046aqds/ls1046aqds.c
> > index 8c18538..a418590 100644
> > --- a/board/freescale/ls1046aqds/ls1046aqds.c
> > +++ b/board/freescale/ls1046aqds/ls1046aqds.c
> > @@ -20,6 +20,7 @@
> >  #include <fsl_csu.h>
> >  #include <fsl_esdhc.h>
> >  #include <fsl_ifc.h>
> > +#include <fsl_sec.h>
> >  #include <spl.h>
> >
> >  #include "../common/vid.h"
> > @@ -242,6 +243,23 @@ int board_init(void)
> >  	if (adjust_vdd(0))
> >  		printf("Warning: Adjusting core voltage failed.\n");
> >
> > +#ifdef CONFIG_SECURE_BOOT
> > +	/* In case of Secure Boot, the IBR configures the SMMU
> > +	 * to allow only Secure transactions.
> > +	 * SMMU must be reset in bypass mode.
> > +	 * Set the ClientPD bit and Clear the USFCFG Bit
> > +	 */
> 
> Multiple-line comment in wrong format. You just fixed some in your first patch.
> 
> York

Sure I will fix this multi-line comment in next patch-set.

-Sumit
diff mbox

Patch

diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS
index b4549ae..6737d55 100644
--- a/board/freescale/ls1046aqds/MAINTAINERS
+++ b/board/freescale/ls1046aqds/MAINTAINERS
@@ -8,3 +8,7 @@  F:	configs/ls1046aqds_nand_defconfig
 F:	configs/ls1046aqds_sdcard_ifc_defconfig
 F:	configs/ls1046aqds_sdcard_qspi_defconfig
 F:	configs/ls1046aqds_qspi_defconfig
+
+M:	Sumit Garg <sumit.garg@nxp.com>
+S:	Maintained
+F:	configs/ls1046aqds_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 8c18538..a418590 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -20,6 +20,7 @@ 
 #include <fsl_csu.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
+#include <fsl_sec.h>
 #include <spl.h>
 
 #include "../common/vid.h"
@@ -242,6 +243,23 @@  int board_init(void)
 	if (adjust_vdd(0))
 		printf("Warning: Adjusting core voltage failed.\n");
 
+#ifdef CONFIG_SECURE_BOOT
+	/* In case of Secure Boot, the IBR configures the SMMU
+	 * to allow only Secure transactions.
+	 * SMMU must be reset in bypass mode.
+	 * Set the ClientPD bit and Clear the USFCFG Bit
+	 */
+	u32 val;
+	val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+	out_le32(SMMU_SCR0, val);
+	val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+	out_le32(SMMU_NSCR0, val);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+	sec_init();
+#endif
+
 	return 0;
 }
 
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
new file mode 100644
index 0000000..2640dc8
--- /dev/null
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -0,0 +1,29 @@ 
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046AQDS=y
+CONFIG_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, SECURE_BOOT"
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_SYS_NS16550=y
+CONFIG_FSL_DSPI=y
+CONFIG_RSA=y