From patchwork Thu Oct 6 10:55:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 678826 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sqV3m3Grbz9ryT for ; Thu, 6 Oct 2016 21:57:40 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E7660A7690; Thu, 6 Oct 2016 12:57:03 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cw_btjnUVsCG; Thu, 6 Oct 2016 12:57:03 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 25CD3B380F; Thu, 6 Oct 2016 12:57:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F2D65A75B7 for ; Thu, 6 Oct 2016 12:56:57 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AVXaND9_72JG for ; Thu, 6 Oct 2016 12:56:57 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pf0-f194.google.com (mail-pf0-f194.google.com [209.85.192.194]) by theia.denx.de (Postfix) with ESMTPS id 28603A7675 for ; Thu, 6 Oct 2016 12:56:52 +0200 (CEST) Received: by mail-pf0-f194.google.com with SMTP id n24so991629pfb.3 for ; Thu, 06 Oct 2016 03:56:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lR0Czs1ExtWwsAM9HzufdxXXJoEGpMvVEXZ5ylG0DfM=; b=QD00S3mFsNMESPqVGO5zZ71tkQL7VVSGz/+C1/qFvGVXwS6e+5nTuWfD4HdF0HIdEO orcezX41XPMspCohKIQcEJDrmFr24JKo6MLCnjYsRxfiNePkklW2JP/ien4UTNpk6Wqi BVKFmXPyuZdYgQy1vFfVvzgFfk9TJm+mtGyEfIC0fnDPpD4pxbnuKE2a4Us78mme955t Zytlx1xSQmtSpqkGv1UcthewL179MMji6NVvFP3XacvaZtVaydLCKvt/nCOQ1UlU1a4k /wfbY9TlYXmArq1/6//Z1sp5dTfK0yYPCaP1QCPtpBrrQSERnRTVT86AGm19CqYxVgU/ ByIg== X-Gm-Message-State: AA6/9RlzbZxkwMrr0TmsaVbgg/3qh8GlGlY5eduKphCw9YRVw8xCxxDtDyocKuTjhRE0gA== X-Received: by 10.98.107.4 with SMTP id g4mr7110659pfc.155.1475751410599; Thu, 06 Oct 2016 03:56:50 -0700 (PDT) Received: from Mr.J ([49.204.230.134]) by smtp.gmail.com with ESMTPSA id t18sm4659007pfk.29.2016.10.06.03.56.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 06 Oct 2016 03:56:49 -0700 (PDT) From: Jagan Teki To: Stefano Babic Date: Thu, 6 Oct 2016 16:25:24 +0530 Message-Id: <1475751324-14605-6-git-send-email-jteki@openedev.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1475751324-14605-1-git-send-email-jteki@openedev.com> References: <1475751324-14605-1-git-send-email-jteki@openedev.com> Cc: u-boot@lists.denx.de, Jagan Teki , Joe Hershberger Subject: [U-Boot] [PATCH v5 5/5] icorem6: Use CONFIG_DM_ETH support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jagan Teki Use CONFIG_DM_ETH and remove board_eth_init code from board files. Cc: Joe Hershberger Cc: Peng Fan Cc: Stefano Babic Cc: Michael Trimarchi Signed-off-by: Jagan Teki Acked-by: Joe Hershberger --- arch/arm/cpu/armv7/mx6/Kconfig | 1 + board/engicam/icorem6/icorem6.c | 71 ------------------------------------ configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_nand_defconfig | 1 - 4 files changed, 1 insertion(+), 73 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 762a581..8456b0e 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -100,6 +100,7 @@ config TARGET_MX6Q_ICORE select MX6QDL select OF_CONTROL select DM + select DM_ETH select DM_GPIO select DM_MMC select DM_THERMAL diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index c152007..587775e 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -7,8 +7,6 @@ */ #include -#include -#include #include #include @@ -27,80 +25,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - static iomux_v3_cfg_t const uart4_pads[] = { IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), }; -static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL | PAD_CTL_SRE_FAST)), - IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -#ifdef CONFIG_FEC_MXC -#define ENET_PHY_RST IMX_GPIO_NR(7, 12) -static int setup_fec(void) -{ - struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; - s32 timeout = 100000; - u32 reg = 0; - int ret; - - /* Enable fec clock */ - setbits_le32(&ccm->CCGR1, MXC_CCM_CCGR1_ENET_MASK); - - /* use 50MHz */ - ret = enable_fec_anatop_clock(0, ENET_50MHZ); - if (ret) - return ret; - - /* Enable PLLs */ - reg = readl(&anatop->pll_enet); - reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN; - writel(reg, &anatop->pll_enet); - reg = readl(&anatop->pll_enet); - reg |= BM_ANADIG_PLL_SYS_ENABLE; - while (timeout--) { - if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_SYS_LOCK) - break; - } - if (timeout <= 0) - return -EIO; - reg &= ~BM_ANADIG_PLL_SYS_BYPASS; - writel(reg, &anatop->pll_enet); - - /* reset the phy */ - gpio_direction_output(ENET_PHY_RST, 0); - udelay(10000); - gpio_set_value(ENET_PHY_RST, 1); - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - int ret; - - SETUP_IOMUX_PADS(enet_pads); - setup_fec(); - - return ret = cpu_eth_init(bis); -} -#endif - #ifdef CONFIG_NAND_MXS #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 221ea7e..fbcbdc8 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -28,7 +28,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_LIBFDT=y CONFIG_FEC_MXC=y CONFIG_MXC_UART=y -CONFIG_NETDEVICES=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 8ac3099..4b544fc 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -24,7 +24,6 @@ CONFIG_OF_LIBFDT=y CONFIG_FEC_MXC=y CONFIG_MXC_UART=y CONFIG_NAND_MXS=y -CONFIG_NETDEVICES=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y