From patchwork Fri Sep 16 20:48:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 671144 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sbS8s4bn8z9sDG for ; Sat, 17 Sep 2016 06:50:21 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=VN0QdA3i; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C87F4A759C; Fri, 16 Sep 2016 22:50:02 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wiDN6SSGB7bW; Fri, 16 Sep 2016 22:50:02 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 99621A758E; Fri, 16 Sep 2016 22:49:52 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2DB29A7559 for ; Fri, 16 Sep 2016 22:49:48 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id llzPb18U1cPF for ; Fri, 16 Sep 2016 22:49:48 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pf0-f193.google.com (mail-pf0-f193.google.com [209.85.192.193]) by theia.denx.de (Postfix) with ESMTPS id 2C600A756F for ; Fri, 16 Sep 2016 22:49:43 +0200 (CEST) Received: by mail-pf0-f193.google.com with SMTP id 6so1073071pfl.2 for ; Fri, 16 Sep 2016 13:49:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZCR6Ko7SzCiJjZnrVCysTX2pP/zseV4ho42+WZSwR0I=; b=VN0QdA3iOOoP0ekmxUuRDOfhJpiT11IGSw3WrmsECCL4QR+TzCcdJe7TxXz6cJyKb0 m7xOC0u0q7Limws1o/aIKqx67u2x3qsdfDvvbzJXTaRQWmCRk6+c7qV+/kPjVEEC6BVg uhrNiNSP0g0oDHQmkmOlEjVAMM6GKZT2v6pQg5aV6ebeD6uo9g6spd1CfFjXMBWtn+x0 dr3j9a8IiFnMZt1YJBZfRRGg9ut3gR6ZUjPhHREUZwPnwD9Clf797XVc6tMlmsawYbxB 3nFwDYzhOnqpqRknWnBc2wByFMuAZMlycTxiNyFpcSTcEnbq+FgYzs5jpnQaT7pd/hlB WjxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZCR6Ko7SzCiJjZnrVCysTX2pP/zseV4ho42+WZSwR0I=; b=HsOVNhzX885FRLMb4/G4Hyfk4ayEuIS8vHMQ9VVYWSgTc2vCiVDdqoUKi0Rd84aMPH nT0Dc7DRxAwmbZ0neZrMy0nFzyh4XxIqBAWjj5yYIHb5h1bmRuDWqH7r2S/JBwZVaNQV VGvzApiGQkr1tM0wQgMdw9cj/VyLbN8crzwBqx9SdSZ+TUQeOcc3uMRGurKGOZzGYpvR mAcuOSpRYgJVpjRi1N9vuVaeX2CDz0bWo6kyG9jSWzvuCr2vzKOvIz5uxjhp1MpGhcjn sEyRcz7VGbQIisCNuSXhwqW+9A47W3ofXnm8cpeb+eJvQ7YTXB4M73TPOsOESbdsUkEf fHhg== X-Gm-Message-State: AE9vXwPdZ0OVS3xxNGrbBJU9CYiz0RSL836Rl83kacYhtP/kNeNfyH2ercMTbKndYG8RFw== X-Received: by 10.98.152.69 with SMTP id q66mr12046823pfd.176.1474058982067; Fri, 16 Sep 2016 13:49:42 -0700 (PDT) Received: from Mr.J ([49.204.230.134]) by smtp.gmail.com with ESMTPSA id g10sm54190693pfc.57.2016.09.16.13.49.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 16 Sep 2016 13:49:40 -0700 (PDT) From: Jagan Teki X-Google-Original-From: Jagan Teki To: Stefano Babic Date: Sat, 17 Sep 2016 02:18:38 +0530 Message-Id: <1474058929-17637-7-git-send-email-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1474058929-17637-1-git-send-email-jagan@amarulasolutions.com> References: <1474058929-17637-1-git-send-email-jagan@amarulasolutions.com> Cc: Matteo Lisi , Joe Hershberger , u-boot@lists.denx.de, Jagan Teki , Fabio Estevam Subject: [U-Boot] [PATCH v2 06/17] imx6: icorem6: Add ENET support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add enet support for engicam icorem6 qdl starter kit. - Add pinmux settings - Add board_eth_init TFTP log: -------- Net: FEC [PRIME] Hit any key to stop autoboot: 0 icorem6qdl> tftpboot {fdt_addr} imx6dl-icore.dtb Using FEC device TFTP from server 192.168.2.96; our IP address is 192.168.2.75 Filename 'imx6dl-icore.dtb'. Load address: 0x0 Loading: ###### 1.3 MiB/s done Bytes transferred = 28976 (7130 hex) CACHE: Misaligned operation at range [00000000, 00007130] icorem6qdl> Cc: Joe Hershberger Cc: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- board/engicam/icorem6/icorem6.c | 72 +++++++++++++++++++++++++++++++++++++++++ configs/imx6qdl_icore_defconfig | 2 ++ include/configs/imx6qdl_icore.h | 12 +++++++ 3 files changed, 86 insertions(+) diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index b0595ef..4331ad3 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -9,12 +9,15 @@ #include #include #include +#include +#include #include #include #include #include +#include #include #include #include @@ -30,11 +33,28 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + static iomux_v3_cfg_t const uart4_pads[] = { IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), }; +static iomux_v3_cfg_t const enet_pads[] = { + IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL | PAD_CTL_SRE_FAST)), + IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + static iomux_v3_cfg_t const usdhc1_pads[] = { IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), @@ -99,6 +119,58 @@ int board_mmc_init(bd_t *bis) } #endif +#ifdef CONFIG_FEC_MXC +#define ENET_PHY_RST IMX_GPIO_NR(7, 12) +static int setup_fec(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + s32 timeout = 100000; + u32 reg = 0; + int ret; + + /* Enable fec clock */ + setbits_le32(&ccm->CCGR1, MXC_CCM_CCGR1_ENET_MASK); + + /* use 50MHz */ + ret = enable_fec_anatop_clock(0, ENET_50MHZ); + if (ret) + return ret; + + /* Enable PLLs */ + reg = readl(&anatop->pll_enet); + reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN; + writel(reg, &anatop->pll_enet); + reg = readl(&anatop->pll_enet); + reg |= BM_ANADIG_PLL_SYS_ENABLE; + while (timeout--) { + if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_SYS_LOCK) + break; + } + if (timeout <= 0) + return -EIO; + reg &= ~BM_ANADIG_PLL_SYS_BYPASS; + writel(reg, &anatop->pll_enet); + + /* reset the phy */ + gpio_direction_output(ENET_PHY_RST, 0); + udelay(10000); + gpio_set_value(ENET_PHY_RST, 1); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int ret; + + SETUP_IOMUX_PADS(enet_pads); + setup_fec(); + + return ret = cpu_eth_init(bis); +} +#endif + int board_early_init_f(void) { SETUP_IOMUX_PADS(uart4_pads); diff --git a/configs/imx6qdl_icore_defconfig b/configs/imx6qdl_icore_defconfig index a658f4b..bdaf6dc 100644 --- a/configs/imx6qdl_icore_defconfig +++ b/configs/imx6qdl_icore_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMLS is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index e12e772..b5ad865 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -101,6 +101,18 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_SP_OFFSET) +#ifdef CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC +#endif + /* SPL */ #ifdef CONFIG_SPL #define CONFIG_SPL_LIBCOMMON_SUPPORT