From patchwork Fri Jul 8 15:42:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 646464 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rmJkZ73wFz9t0p for ; Sat, 9 Jul 2016 01:46:30 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=LXPO6jid; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9B233A752A; Fri, 8 Jul 2016 17:46:08 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id meRNhl1L4MBH; Fri, 8 Jul 2016 17:46:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 03D9BA7530; Fri, 8 Jul 2016 17:45:53 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4DE1F4B951 for ; Fri, 8 Jul 2016 17:45:26 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WNlmFKCwC_2J for ; Fri, 8 Jul 2016 17:45:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lf0-f65.google.com (mail-lf0-f65.google.com [209.85.215.65]) by theia.denx.de (Postfix) with ESMTPS id 040894B71E for ; Fri, 8 Jul 2016 17:45:24 +0200 (CEST) Received: by mail-lf0-f65.google.com with SMTP id a10so6294770lfb.1 for ; Fri, 08 Jul 2016 08:45:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BZhbNj1Tmi8C5awBc4qwoKt2zraxTsI60LGOF8s2+CQ=; b=LXPO6jid9c+qZqF9229k1HPJUYIn1nvQZSOgB8/sZ96A6XJbF/U2WGpOIZ6rtkxCVv R98ygXa2IWV8ttI3cziOG/B6OFuzH2i9zO65roWelEBHIFYL/xHcLLLSCwCX9IgVzq7d xRPu1XqVzIEPW48p/aXVjOu7qQs9jKQ0Q0O5IYUUBKBsDnAhzgzADePEqrxfXrAJSa1n nMrSvolWoILlkAItIlfWQvhas1tuHwWF8fbc8HO9wfi9KrVkoXEO7Q7TZ5qRWkHVtMIT HY+LaXMxdc4hbyov6CuTAH9GVI6qhZqq9t2U+PyP6yL945bcjZU1qrEOYNxf3BmkD87f LMnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BZhbNj1Tmi8C5awBc4qwoKt2zraxTsI60LGOF8s2+CQ=; b=l0uOAwIaFVckBHIErgbNeJ5TXHdWlUbGKtFlD4HCGjzhih4RCDlTcoYLAWvly1oGI6 Ke7dOwAF32nHvpe9zC0gFndzOi/VkljckDRyU9sVF751oLIWiwJeHqpjag77RYg1pOJh 2CpL0TqzaLHA3M+UBtIZe3FMl3senBGqKO0Yy3MDextjpIVaEYyH6ycLt5cgKkDyIVm2 lDS3j3VLHxq8xZwZK29wB1hmleT9IHJnI70Hq5+XEAY3i9pQhaxB4X+tOeYxtNfeHrzH Aw6D0SuzEsFxSr+fmEb3jt3/fbOWJ2gmYO8u4BayEJlM1wsxr9tlHbyubniVRxpj1Wgx LyvA== X-Gm-Message-State: ALyK8tIwmy5rvp92EGm54clyQVIbXtksY3KGysUyuKDEj3N9d0sp+jMlHtojWaS0yUVVZQ== X-Received: by 10.25.168.76 with SMTP id r73mr1947088lfe.136.1467992724451; Fri, 08 Jul 2016 08:45:24 -0700 (PDT) Received: from octofox.metropolis ([5.19.183.212]) by smtp.gmail.com with ESMTPSA id h31sm1839589ljh.29.2016.07.08.08.45.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jul 2016 08:45:23 -0700 (PDT) From: Max Filippov To: u-boot@lists.denx.de Date: Fri, 8 Jul 2016 18:42:05 +0300 Message-Id: <1467992526-13417-8-git-send-email-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1467992526-13417-1-git-send-email-jcmvbkbc@gmail.com> References: <1467992526-13417-1-git-send-email-jcmvbkbc@gmail.com> Cc: Tom Rini , Chris Zankel , Marc Gauthier Subject: [U-Boot] [PATCH 7/8] net/ethoc: don't advertise gigabit on the connected PHY X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Introduce MDIO communication routines. Scan MDIO bus at reset to find attached PHYs and see if they support gigabit speeds. If they do check their gigabit control register: if gigabit autonegotiation is enabled clear it and reset the PHY. This allows using OpenCores 10/100 MAC with gigabit PHY connected to gigabit network. Signed-off-by: Max Filippov --- drivers/net/ethoc.c | 76 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c index ee7c01e..8f70c0c 100644 --- a/drivers/net/ethoc.c +++ b/drivers/net/ethoc.c @@ -290,6 +290,80 @@ static int ethoc_init_ring(struct eth_device *dev) return 0; } +#ifdef CONFIG_SYS_ETHOC_SETUP_PHY + +static u16 ethoc_mii_read(struct eth_device *dev, u8 phy, u8 reg) +{ + ulong tmo = get_timer(0); + + ethoc_write(dev, MIIADDRESS, MIIADDRESS_ADDR(phy, reg)); + ethoc_write(dev, MIICOMMAND, MIICOMMAND_READ); + + while (get_timer(tmo) < CONFIG_SYS_HZ) { + u32 status = ethoc_read(dev, MIISTATUS); + if (!(status & MIISTATUS_BUSY)) { + u32 data = ethoc_read(dev, MIIRX_DATA); + /* reset MII command register */ + ethoc_write(dev, MIICOMMAND, 0); + return data; + } + } + return 0xffff; +} + +static void ethoc_mii_write(struct eth_device *dev, u8 phy, u8 reg, u16 v) +{ + ulong tmo = get_timer(0); + + ethoc_write(dev, MIIADDRESS, MIIADDRESS_ADDR(phy, reg)); + ethoc_write(dev, MIITX_DATA, v); + ethoc_write(dev, MIICOMMAND, MIICOMMAND_WRITE); + + while (get_timer(tmo) < CONFIG_SYS_HZ) { + u32 stat = ethoc_read(dev, MIISTATUS); + if (!(stat & MIISTATUS_BUSY)) { + /* reset MII command register */ + ethoc_write(dev, MIICOMMAND, 0); + return; + } + } +} + +static void ethoc_setup_phy(struct eth_device *dev) +{ + u8 phy; + + ethoc_write(dev, MIIMODER, 0xfe); + + for (phy = 0; phy < 32; ++phy) { + if (ethoc_mii_read(dev, phy, MII_PHYSID1) != 0xffff) { + u16 v; + + v = ethoc_mii_read(dev, phy, MII_BMSR); + if (!(v & BMSR_ESTATEN)) + continue; + + v = ethoc_mii_read(dev, phy, MII_CTRL1000); + if (!(v & (ADVERTISE_1000FULL | ADVERTISE_1000HALF))) + continue; + + ethoc_mii_write(dev, phy, MII_CTRL1000, + v & ~(ADVERTISE_1000FULL | + ADVERTISE_1000HALF)); + v = ethoc_mii_read(dev, phy, MII_BMCR); + ethoc_mii_write(dev, phy, MII_BMCR, v | BMCR_RESET); + } + } +} + +#else + +static inline void ethoc_setup_phy(struct eth_device *dev) +{ +} + +#endif + static int ethoc_reset(struct eth_device *dev) { u32 mode; @@ -311,6 +385,8 @@ static int ethoc_reset(struct eth_device *dev) ethoc_write(dev, MODER, mode); ethoc_write(dev, IPGT, 0x15); + ethoc_setup_phy(dev); + ethoc_ack_irq(dev, INT_MASK_ALL); ethoc_enable_rx_and_tx(dev); return 0;