From patchwork Wed Jun 15 19:09:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 636022 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rVGMZ3K30z9sxR for ; Thu, 16 Jun 2016 05:11:22 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5B9C1A7742; Wed, 15 Jun 2016 21:10:32 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NgsLuv-lwNfi; Wed, 15 Jun 2016 21:10:32 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AEA04A7766; Wed, 15 Jun 2016 21:10:03 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 05461A7548 for ; Wed, 15 Jun 2016 21:09:39 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NFmWG4j4Y1t6 for ; Wed, 15 Jun 2016 21:09:38 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.free-electrons.com (down.free-electrons.com [37.187.137.238]) by theia.denx.de (Postfix) with ESMTP id 7D119A7534 for ; Wed, 15 Jun 2016 21:09:35 +0200 (CEST) Received: by mail.free-electrons.com (Postfix, from userid 110) id D756C4A4; Wed, 15 Jun 2016 21:09:33 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon.home (LFbn-1-2159-240.w90-76.abo.wanadoo.fr [90.76.216.240]) by mail.free-electrons.com (Postfix) with ESMTPSA id 78F54B1; Wed, 15 Jun 2016 21:09:33 +0200 (CEST) From: Boris Brezillon To: Hans de Goede , Scott Wood Date: Wed, 15 Jun 2016 21:09:28 +0200 Message-Id: <1466017768-6685-9-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1466017768-6685-1-git-send-email-boris.brezillon@free-electrons.com> References: <1466017768-6685-1-git-send-email-boris.brezillon@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 8/8] sunxi: Enable NAND controller on the CHIP X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the NAND controller in the sun5i-r8-chip.dts. Signed-off-by: Boris Brezillon Acked-by: Hans de Goede --- arch/arm/dts/sun5i-a10s.dtsi | 14 ++++++++++++++ arch/arm/dts/sun5i-a13-olinuxino.dts | 15 +++++++++++++++ arch/arm/dts/sun5i-r8-chip.dts | 15 +++++++++++++++ 3 files changed, 44 insertions(+) diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi index bddd0de..a5f8855 100644 --- a/arch/arm/dts/sun5i-a10s.dtsi +++ b/arch/arm/dts/sun5i-a10s.dtsi @@ -241,6 +241,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + nand_cs2_pins_a: nand_cs@2 { + allwinner,pins = "PC17"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + nand_cs3_pins_a: nand_cs@3 { + allwinner,pins = "PC18"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; &sram_a { diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts index b3c234c..30e069a 100644 --- a/arch/arm/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/dts/sun5i-a13-olinuxino.dts @@ -155,6 +155,21 @@ status = "okay"; }; +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + allwinner,randomize; + }; +}; + &ohci0 { status = "okay"; }; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index 6ad19e2..b1b62d5 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -142,6 +142,21 @@ status = "okay"; }; +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + }; +}; + &ohci0 { status = "okay"; };