From patchwork Wed Jun 8 16:43:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 632390 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rPvQq0fnSz9sDC for ; Thu, 9 Jun 2016 02:44:03 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 12012A7599; Wed, 8 Jun 2016 18:44:01 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XMQH9zhDAbnX; Wed, 8 Jun 2016 18:44:00 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3A835A755D; Wed, 8 Jun 2016 18:44:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5DB3AA7519 for ; Wed, 8 Jun 2016 18:43:57 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1WofwZzBZf3K for ; Wed, 8 Jun 2016 18:43:57 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.free-electrons.com (down.free-electrons.com [37.187.137.238]) by theia.denx.de (Postfix) with ESMTP id 1A62BA7516 for ; Wed, 8 Jun 2016 18:43:54 +0200 (CEST) Received: by mail.free-electrons.com (Postfix, from userid 110) id BC30E37B; Wed, 8 Jun 2016 18:43:53 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon.home (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 6C43E2B1; Wed, 8 Jun 2016 18:43:53 +0200 (CEST) From: Boris Brezillon To: Hans de Goede , Scott Wood Date: Wed, 8 Jun 2016 18:43:43 +0200 Message-Id: <1465404228-17611-2-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1465404228-17611-1-git-send-email-boris.brezillon@free-electrons.com> References: <1465404228-17611-1-git-send-email-boris.brezillon@free-electrons.com> Cc: Tom Rini , u-boot@lists.denx.de, linux-sunxi@googlegroups.com Subject: [U-Boot] [PATCH v2 1/6] sunxi: Add missing macros to configure the NAND controller clk X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We need some macros to manipulate the NAND controller clock. Signed-off-by: Boris Brezillon Acked-by: Hans de Goede --- arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index 0088bb9..d1c5ad0 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -269,6 +269,11 @@ struct sunxi_ccm_reg { #define CCM_MBUS_CTRL_CLK_SRC_PLL5 0x2 #define CCM_MBUS_CTRL_GATE (0x1 << 31) +#define CCM_NAND_CTRL_M(x) ((x) - 1) +#define CCM_NAND_CTRL_N(x) ((x) << 16) +#define CCM_NAND_CTRL_OSCM24 (0x0 << 24) +#define CCM_NAND_CTRL_PLL6 (0x1 << 24) +#define CCM_NAND_CTRL_PLL5 (0x2 << 24) #define CCM_NAND_CTRL_ENABLE (0x1 << 31) #define CCM_MMC_CTRL_M(x) ((x) - 1)