From patchwork Thu Jun 2 12:16:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 628987 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rKxkh1nZ3z9t60 for ; Thu, 2 Jun 2016 16:14:03 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4EDB44BE95; Thu, 2 Jun 2016 08:14:00 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id d0F2wnKo5q3J; Thu, 2 Jun 2016 08:14:00 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CE475A74A8; Thu, 2 Jun 2016 08:13:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F0F6EA74A8 for ; Thu, 2 Jun 2016 08:13:55 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sJW2w031ikjy for ; Thu, 2 Jun 2016 08:13:55 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bon0080.outbound.protection.outlook.com [157.56.111.80]) by theia.denx.de (Postfix) with ESMTPS id 4ED094BDE9 for ; Thu, 2 Jun 2016 08:13:51 +0200 (CEST) Received: from BY2PR03CA010.namprd03.prod.outlook.com (10.255.93.27) by BL2PR03MB372.namprd03.prod.outlook.com (10.141.89.15) with Microsoft SMTP Server (TLS) id 15.1.492.11; Thu, 2 Jun 2016 05:59:40 +0000 Received: from BY2FFO11FD035.protection.gbl (10.255.93.4) by BY2PR03CA010.outlook.office365.com (10.255.93.27) with Microsoft SMTP Server (TLS) id 15.1.492.11 via Frontend Transport; Thu, 2 Jun 2016 05:59:39 +0000 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=none action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD035.mail.protection.outlook.com (10.1.14.220) with Microsoft SMTP Server (TLS) id 15.1.497.8 via Frontend Transport; Thu, 2 Jun 2016 05:59:39 +0000 Received: from localhost.ap.freescale.net ([10.232.14.164]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id u525xYWb003544; Wed, 1 Jun 2016 22:59:35 -0700 From: Sumit Garg To: Date: Thu, 2 Jun 2016 08:16:37 -0400 Message-ID: <1464869797-10289-1-git-send-email-sumit.garg@nxp.com> X-Mailer: git-send-email 1.8.1.4 X-EOPAttributedMessage: 0 X-Matching-Connectors: 131093207798840283; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.158.2; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(1109001)(1110001)(339900001)(199003)(189002)(9170700003)(2351001)(229853001)(6806005)(104016004)(105606002)(47776003)(50226002)(85426001)(19580395003)(76506005)(15975445007)(575784001)(36756003)(11100500001)(50466002)(48376002)(77096005)(106466001)(87936001)(86362001)(50986999)(189998001)(5008740100001)(110136002)(5003940100001)(33646002)(586003)(19580405001)(81166006)(8936002)(8676002)(4326007)(2906002)(92566002)(8666004)(7059030)(4720700001); DIR:OUT; SFP:1101; SCL:1; SRVR:BL2PR03MB372; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; A:1; MX:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; BY2FFO11FD035; 1:SdM3q2WqJuukTtSX2vf7RJtZ+7ufGN1EdkoHI1245g2FiSONh9vSqrl5syVWaqSYjWeZbAhhVe2S0YR2vXqp6kLL8eNaJ64Cs0x+SU9bxPB6i9GTCaO5XRShbwGu0LTbZcduQcRmFbZ9ickRwXCRHRx6iXbLkAGUozLUHb31/4kBzsABmPlszSVJ2rP51/qRRLEq61NLfECeVBvtZMh4wxpdZiEeGtvA/zjzaoQ1ebmBb0NebPqAlAmU4goiQxBTR52y/f2oWXqQghyp8pwDy/kZ1RMwjt7IaABuQZOfPaj/VKLCzFm82TJ8Njw9H6rQvDdY0IYnJ2yASrE1XIKsGp3X15c1webJcQ5Z5AyPsmIN774N6KJUoCiwehelKtEnXEhnxcMOTLtAvthVR+VFbwpwKInY94/8h03VkY5sjqdMVejO27rrKt55UqA27hyZIr1eL8EsS7dDIOpPE+kWQV3FhRl4V574xh0IE47ZN5Lvh/gnOTnWR1SqQRrhjT+EBj3YtlZjx+vHSuilWLlPYi0I9chR4KOU4330XIbZRKGB+E8cASjXf5+W2kCsZwUtiLxNuWNmJ3Ay0RHd5yI69ggXWy9EGobrYkfCSE4kfwYZuPnCUdBYk+i5mkYuAcDuH67cGTCvhwkGdRHt+a5Tb1Onuun5WTyA69PKZWjuXNf9Eb+NV6n4p4/O/zBFZsT/ MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 432f13d1-f101-4036-f0d3-08d38aab15b4 X-Microsoft-Exchange-Diagnostics: 1; BL2PR03MB372; 2:5R8zq9lpjiMLmONMkqGWkVKta1QSCSjizhnZSJgeVzwh6sHIZMwtkPIIwFn773tw4OOczK+kDzCH4DZkHtrsa/OCTGwLLybhBuqTPCgMdIQCrYqiJ8koVZ6tBMWkneDkqDPZ7GGbiHKyUSGSVBfNMfkoGdw5q6BaufrIlRSMDgsc0xt8hOhxC42R2gk0m3ER; 3:D9oTQM+a8Z8fiyQjj4WELiP18BjZOcjwMarGRxRkkBY6D7Zl7IDhp7/lTxWJVPzcGHWC8AhpJz39NWRY1Fyg3bJCGzkiilB90d/0mcWbXbY5Qrb8MmCTEZW8ANcivLhsULfK9tyeDb9oyTIkSIBN9RVKWl5vGBwt/nB/1R3tqYbEpFLRisJQCu3QxOOsy9JT7L+2guM96Gr0JDUB1IJpgEy8pWw2m7pstrFReIiPNCc= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB372; X-Microsoft-Exchange-Diagnostics: 1; BL2PR03MB372; 25:sjrNAu88cIzmLp4WcIg20rWAMOltIRWk041Gb7Mw5CmjtsIUyIRP8/BQ3Eo4AAo0Db2oNc1azJIRS5HdaXhS3uj6L4xBG3NxvgYc1ZUeOur5Sxp5XwRkNFCK5fXdDpRf4ZqeZludwVBVO3Q2I8kVcVkdScV6TG4aEbJQuF9fKsYTZw9cd9smEauZcSLTPO9Grw9AXL9engxNegtQnBwXW2R8Sg6hWJq8OIncrO6a9CuDZeOYNdhCjPdGQfRJ+USM6DU8cIZERtFygHS+ixNSlOzpKPzg4nsrLBhhFz37DGQlBtSKQqdW4Au04TILjEuULZUDPxoPoGga9LZFNW7c2hStR/76HYHuUS+iUowuOaDocoLxzkk9JEZen6pJqRetgKVajqiwjWaQZuWD6EzzbAdOlAdIPfeXs7Hw+dYaAj95jrVdEeQzLewRzsqgBUmUzW6j2ij7RvTi3gI4YLRP6EWISAjbVzhx/zV/8ctgZ/fZ8DDw3m7pdKjczOWmKZhG+15i3z4hXrsmjoomiXDBWHGwieD4OwXgCg7wIpQHGO8IWjdNhHQrY1hx8uFR8mKroQ+qFtw0uwu+ZyAwG7vAEL718TxYodmaaW4DOfhCI9P0RooPsEeoZKeDYKfZ9cVHRaXQNGVR5+PW50TFJbgT67FgbOQlC8it1RNTB7gL0YXdu1tyeRNPMT8OAvvgQnPvceYH1XVXxAVPmpvuMtwGcUVa9xY8pGXxl5VimPpFyvmjDbqN9h+dq3IDPjbGMqCH/5EBAs4zTxtrm80wnS4KBBHxbbp/kwt9G00oWk6+dGYPMKeuw9OcT29fQwPXESiA+LGPByprnQwZ+FSBznqPCiqPfgtweH+yULq/0KG/jwHZReKs+bf3kXTkwosLj2RzLI94CsP6Vq39515+LH075A== X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(13024025)(13015025)(13023025)(13018025)(13017025)(5005006)(8121501046)(3002001)(10201501046)(6055026); SRVR:BL2PR03MB372; BCL:0; PCL:0; RULEID:(400006); SRVR:BL2PR03MB372; X-Microsoft-Exchange-Diagnostics: 1; BL2PR03MB372; 4:Ds8IlhbHX74jlfyY69pBGfNFE+1YH7ovzHrHGEWobb8PBIYQWHylx131RfoZnwKpA3XxabxjrdTz0bUE0gAdc44upIWrYZjTshXS/RjiIBmMAIlYOgVVTobtd8wv/jiG4c9fulSMKRcrz6EGNT/oDqhzHyTGLtMl3Z30ny3TLWfhF9Gpr7F/KlYp3bzVxAPfHrvW1XctIApQrnZHpgSmNbBMeeeWGjGIAcLW8GtBIB462JGsBfzBh0wBcuRo+q+8X3UbIQjFHakbDOJ10D6J26FuSfMCpsDUyrVN8cpWVqU3ExVZOToXGvb8X+2nuWhRPaMC7HkmZm0+gr7Dl3Wk9HwK6ayRNLPrWb789a9uNhuzT2Myq/WTVAC8VVPQrMuIRKpVNwAQZ13alI4/Jeyp87+XNWw0uAYCJqo63/zW5tG2fHesT3DTeYBmKKKnsgBxoFkWyplBUDH2kOGirLWY0dEIUsv6e+d2n4htUiN/Cjwwu9K0jnzIn58VdDZM72gvZ/eyZN7tpY6pYaOKxIwttA== X-Forefront-PRVS: 0961DF5286 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; BL2PR03MB372; 23:glAEUhTZ9lbc88Bh5dmzAiHoO72OW9sV1o73gKvPmH?= =?us-ascii?Q?jfx64idUOUn1OORS/AYtsgsPwLCbqMbzK7mxdSQmVGXrlmgZbUZXwEWRd0PN?= =?us-ascii?Q?d9/oDbfZ19g6cMJ86xm+sIZQSGxQn32N2ISCoVK4s32byI743kLzv1q6YYrN?= =?us-ascii?Q?9VxSSvId8oC/yShzfF8B/4bocDiw/wDhxkopm0fguvP+12rjnyV6m6X/Y4To?= =?us-ascii?Q?TGSU6gFsw0FUTJ+om3GU7dtrG1rFWeqOC3zdzKmBQAZEhPU945d4/IHsbC1e?= =?us-ascii?Q?vzBcaomR5nDEa2PhxcpX/5+HiRsJfQvXAag6DpxIGROC8urSUQ6etiLXn1YK?= =?us-ascii?Q?rgIYTtpEZBEn3Qz7v5r7Nbyl+COe4QWmr/rTARDzcF++GbuZ4RDUHdjku4p2?= =?us-ascii?Q?T/DCrDEdgdSqFb+3Br2SEAE+QCYtCvu+9r7iDrMqzkfcuwz1cHjKaM6o6Ycv?= =?us-ascii?Q?lIOTdPT/Q7NVpP3LXNLF/RWHo3J2P/7qCw5j+1tQuE+mt7wL1tBHlcc1mbIi?= =?us-ascii?Q?fkq9Wq6by0OOo4ZLC7DvxZntrSGMcKWmCh4iJDmeiDSth1IMXbWbnnDOoJI9?= =?us-ascii?Q?j0HfUTU3pfzNCLqi0R2QJqSWAWm2Czd1pSq68QVSoUBtWTzVS33bwOepDNwI?= =?us-ascii?Q?utYO/7/c+ot/xqPc0S3UlMdLTf2QNW5kJ4MoC/dWhgcx/6wvclcqnIfG6GTj?= =?us-ascii?Q?Cq1vn6VUOasb2ngFDNypkQzJlcenWQBPzD8V/80nsRtLevmkjl4Q1fITvdlq?= =?us-ascii?Q?j66IYXw6kNQ1zhmCmwNAWZH3wl83YXxOXF9fTf5SFUKBiCA/tXsxhyWXeniv?= =?us-ascii?Q?MbUvdmYwFfYQXE/chtKHOvf9Qps6XYYkFVVqf8a8uSMuZ4NwP0oL88cMSoyA?= =?us-ascii?Q?3AIERx1c5LGLvD56acvYxZN6wwe8I9oIaR7aSDuvc4WwgO4sOhN71tCns6ps?= =?us-ascii?Q?asCGfmhHGQj0HuNLDbJuH5oaOGadcmKEvhfDkInPGdX8rzybnHB0r8jX4l6V?= =?us-ascii?Q?1vL058atlh/6RARZYuIc12VI5BQe+ffdmf8pFgRWVTDJk8e4Ibo47vWlyS5D?= =?us-ascii?Q?OfGZ+BSoDhpUeaxMLO8JTqNRg5rkBbcRxwsvnXWigNeeSlXWBA4qpXOIiBj0?= =?us-ascii?Q?QQd2AR5UmZN+D5rXfq2P0Fi78Tl/349mAHNUPbhQnVHWIhQQDgZw=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; BL2PR03MB372; 5:c0lZWEZk2KyTsszB2AYsGWrfD6fZP6IOFIlMo/jDTM+26MT1qHhs3q4+K7w4I0LsywuPsJCO3glt+guMsaD/2lCiU1g8rNIdVdja7sKE4Q6YQCHMZl311gRGipaPk5KDO08ikKijTinAOtr931aWoOG0828pJg/1ZnhIfzfemVk=; 24:zazPZRsKL2S0tQJBVhydcb49IrY1ZXW8jDFYDSi+VmrGFCYDO/ikjO16JwZ2ICIc/q+MYU5Dtv4xJeDTXSwD8a+OSbMWouH/SpznKLr7vmE=; 7:ep+Y89S0p2y3DWtSCa7Ouh8Gurw9WUSLi3V6h6zHbm8XmrYIe+gk3MJdzGO1rrz0Bf2JrjZ2glvN+1zHqgO517G8TkxIr5+v6vg8nfEcTxp1zbJcMJtlb2g1ZN0iy25fb7vR+PTcOFrhHMk01cSz7RJ3UOKRcObY3vAYwg3Z+/wMK3HPeMnV47uHRmTLjesN SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2016 05:59:39.6344 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2PR03MB372 Cc: ruchika.gupta@nxp.com Subject: [U-Boot] [PATCH v4 1/2] powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta Signed-off-by: Aneesh Bansal Signed-off-by: Sumit Garg --- Changes in v2: Patches rebased Changes in v3: Patches rebased Changes in v4: Generic changes in lib, drivers, common Makefiles removed from this patchset. Rebased this patchset on top of patch [1], so this patchset is dependent on patch [1]. [1]https://patchwork.ozlabs.org/patch/627664/ arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 8 +++++ arch/powerpc/cpu/mpc8xxx/pamu_table.c | 8 +++++ arch/powerpc/include/asm/fsl_secure_boot.h | 28 ++++++++++++++++ board/freescale/common/fsl_chain_of_trust.c | 50 +++++++++++++++++++++++++++++ drivers/crypto/fsl/jr.c | 16 +++++++++ drivers/mtd/nand/fsl_ifc_spl.c | 24 ++++++++++++++ include/fsl_validate.h | 1 + 7 files changed, 135 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 9421f1e..ede8e66 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -239,15 +239,23 @@ int pamu_init(void) spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES; /* Allocate space for Primary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR)) + ppaact = (void *)CONFIG_SPL_PPAACT_ADDR; +#else ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size); if (!ppaact) return -1; +#endif memset(ppaact, 0, ppaact_size); /* Allocate space for Secondary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR)) + sec = (void *)CONFIG_SPL_SPAACT_ADDR; +#else sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size); if (!sec) return -1; +#endif memset(sec, 0, spaact_size); ppaact_phys = virt_to_phys((void *)ppaact); diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index 26c5ea4..a8e6f51 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -28,6 +28,14 @@ void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries) i++; #endif +#if (defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_INIT_L3_VADDR)) + tbl->start_addr[i] = + (uint64_t)virt_to_phys((void *)CONFIG_SYS_INIT_L3_VADDR); + tbl->size[i] = 256 * 1024; /* 256K CPC flash */ + tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; + + i++; +#endif debug("PAMU address\t\t\tsize\n"); for (j = 0; j < i ; j++) debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 826f9c9..99eec7f 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -72,6 +72,32 @@ #ifdef CONFIG_CHAIN_OF_TRUST +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_DM 1 +#define CONFIG_SPL_CRYPTO_SUPPORT +#define CONFIG_SPL_HASH_SUPPORT +#define CONFIG_SPL_RSA +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +/* + * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init + * due to space crunch on CPC and thus malloc will not work. + */ +#define CONFIG_SPL_PPAACT_ADDR 0x2e000000 +#define CONFIG_SPL_SPAACT_ADDR 0x2f000000 +#define CONFIG_SPL_JR0_LIODN_S 454 +#define CONFIG_SPL_JR0_LIODN_NS 458 +/* + * Define the key hash for U-Boot here if public/private key pair used to + * sign U-boot are different from the SRK hash put in the fuse + * Example of defining KEY_HASH is + * #define CONFIG_SPL_UBOOT_KEY_HASH \ + * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" + * else leave it defined as NULL + */ + +#define CONFIG_SPL_UBOOT_KEY_HASH NULL +#endif /* ifdef CONFIG_SPL_BUILD */ + #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON @@ -82,6 +108,7 @@ #define CONFIG_FSL_CAAM #endif +#ifndef CONFIG_SPL_BUILD /* fsl_setenv_chain_of_trust() must be called from * board_late_init() */ @@ -119,5 +146,6 @@ #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ #include +#endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index ecfcc82..992babf 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -6,7 +6,17 @@ #include #include +#include #include +#include + +#ifdef CONFIG_ADDR_MAP +#include +#endif + +#ifdef CONFIG_FSL_CORENET +#include +#endif #ifdef CONFIG_LS102XA #include @@ -52,6 +62,7 @@ int fsl_check_boot_mode_secure(void) return 0; } +#ifndef CONFIG_SPL_BUILD int fsl_setenv_chain_of_trust(void) { /* Check Boot Mode @@ -68,3 +79,42 @@ int fsl_setenv_chain_of_trust(void) setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD); return 0; } +#endif + +#ifdef CONFIG_SPL_BUILD +void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr) +{ + int res; + + /* Check Boot Mode + * If Boot Mode is Non-Secure, skip validation + */ + if (fsl_check_boot_mode_secure() == 0) + return; + + printf("SPL: Validating U-Boot image\n"); + +#ifdef CONFIG_ADDR_MAP + init_addr_map(); +#endif + +#ifdef CONFIG_FSL_CORENET + if (pamu_init() < 0) + fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT); +#endif + +#ifdef CONFIG_FSL_CAAM + if (sec_init() < 0) + fsl_secboot_handle_error(ERROR_ESBC_SEC_INIT); +#endif + +#if defined(CONFIG_DM) + dm_init_and_scan(false); +#endif + res = fsl_secboot_validate(hdr_addr, CONFIG_SPL_UBOOT_KEY_HASH, + &img_addr); + + if (res == 0) + printf("SPL: Validation of U-boot successful\n"); +} +#endif diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 510fa4e..1d4dd32 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -599,10 +599,26 @@ int sec_init_idx(uint8_t sec_idx) sec_out32(&sec->mcfgr, mcr); #ifdef CONFIG_FSL_CORENET +#ifdef CONFIG_SPL_BUILD + /* For SPL Build, Set the Liodns in SEC JR0 for + * creating PAMU entries corresponding to these. + * For normal build, these are set in set_liodns(). + */ + liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; + liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; + + liodnr = sec_in32(&sec->jrliodnr[0].ls) & + ~(JRNSLIODN_MASK | JRSLIODN_MASK); + liodnr = liodnr | + (liodn_ns << JRNSLIODN_SHIFT) | + (liodn_s << JRSLIODN_SHIFT); + sec_out32(&sec->jrliodnr[0].ls, liodnr); +#else liodnr = sec_in32(&sec->jrliodnr[0].ls); liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; #endif +#endif ret = jr_init(sec_idx); if (ret < 0) { diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c index cbeb74a..30aa966 100644 --- a/drivers/mtd/nand/fsl_ifc_spl.c +++ b/drivers/mtd/nand/fsl_ifc_spl.c @@ -11,6 +11,9 @@ #include #include #include +#ifdef CONFIG_CHAIN_OF_TRUST +#include +#endif static inline int is_blank(uchar *addr, int page_size) { @@ -268,6 +271,27 @@ void nand_boot(void) */ flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); #endif + +#ifdef CONFIG_CHAIN_OF_TRUST + /* + * As U-Boot header is appended at end of U-boot image, so + * calculate U-boot header address using U-boot header size. + */ +#define CONFIG_U_BOOT_HDR_ADDR \ + ((CONFIG_SYS_NAND_U_BOOT_START + \ + CONFIG_SYS_NAND_U_BOOT_SIZE) - \ + CONFIG_U_BOOT_HDR_SIZE) + spl_validate_uboot(CONFIG_U_BOOT_HDR_ADDR, + CONFIG_SYS_NAND_U_BOOT_START); + /* + * In case of failure in validation, spl_validate_uboot would + * not return back in case of Production environment with ITS=1. + * Thus U-Boot will not start. + * In Development environment (ITS=0 and SB_EN=1), the function + * may return back in case of non-fatal failures. + */ +#endif + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot(); } diff --git a/include/fsl_validate.h b/include/fsl_validate.h index a71e1ce..7695b30 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -254,4 +254,5 @@ int fsl_secboot_blob_decap(cmd_tbl_t *cmdtp, int flag, int argc, int fsl_check_boot_mode_secure(void); int fsl_setenv_chain_of_trust(void); +void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr); #endif