From patchwork Tue May 24 06:15:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keerthy X-Patchwork-Id: 625576 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rDXXL3NK7z9t4F for ; Tue, 24 May 2016 21:01:22 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 38DBCA7559; Tue, 24 May 2016 13:01:17 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Lk_imhMZBxMQ; Tue, 24 May 2016 13:01:17 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7A459A75BA; Tue, 24 May 2016 13:00:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CA1C3A74D6 for ; Tue, 24 May 2016 08:15:24 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id u8u5C_VjLEtq for ; Tue, 24 May 2016 08:15:24 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [198.47.19.12]) by theia.denx.de (Postfix) with ESMTPS id 5CCDAA74C5 for ; Tue, 24 May 2016 08:15:23 +0200 (CEST) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u4O6FL0D007042; Tue, 24 May 2016 01:15:21 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4O6FLXo032102; Tue, 24 May 2016 01:15:21 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Tue, 24 May 2016 01:15:21 -0500 Received: from ula0393675.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4O6FBUs021021; Tue, 24 May 2016 01:15:19 -0500 From: Keerthy To: Date: Tue, 24 May 2016 11:45:07 +0530 Message-ID: <1464070507-26159-4-git-send-email-j-keerthy@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464070507-26159-1-git-send-email-j-keerthy@ti.com> References: <1464070507-26159-1-git-send-email-j-keerthy@ti.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 24 May 2016 12:59:51 +0200 Cc: u-boot@lists.denx.de, j-keerthy@ti.com Subject: [U-Boot] [PATCH 3/3] arm: am57xx: Fix alignment where necessary X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This just fixes alignment for better readability. Signed-off-by: Keerthy --- board/ti/am57xx/board.c | 90 ++++++++++++++++++++++++------------------------- 1 file changed, 45 insertions(+), 45 deletions(-) diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 5992f49..6b58722 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -63,28 +63,28 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) } static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { - .sdram_config_init = 0x61851b32, - .sdram_config = 0x61851b32, - .sdram_config2 = 0x08000000, - .ref_ctrl = 0x000040F1, - .ref_ctrl_final = 0x00001035, - .sdram_tim1 = 0xcccf36ab, - .sdram_tim2 = 0x308f7fda, - .sdram_tim3 = 0x409f88a8, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x5007190b, - .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0024400b, - .emif_ddr_phy_ctlr_1 = 0x0e24400b, - .emif_ddr_ext_phy_ctrl_1 = 0x10040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00910091, - .emif_ddr_ext_phy_ctrl_3 = 0x00950095, - .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, - .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, - .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x80000000, - .emif_rd_wr_lvl_ctl = 0x00000000, - .emif_rd_wr_exec_thresh = 0x00000305 + .sdram_config_init = 0x61851b32, + .sdram_config = 0x61851b32, + .sdram_config2 = 0x08000000, + .ref_ctrl = 0x000040F1, + .ref_ctrl_final = 0x00001035, + .sdram_tim1 = 0xcccf36ab, + .sdram_tim2 = 0x308f7fda, + .sdram_tim3 = 0x409f88a8, + .read_idle_ctrl = 0x00050000, + .zq_config = 0x5007190b, + .temp_alert_config = 0x00000000, + .emif_ddr_phy_ctlr_1_init = 0x0024400b, + .emif_ddr_phy_ctlr_1 = 0x0e24400b, + .emif_ddr_ext_phy_ctrl_1 = 0x10040100, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, + .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, + .emif_rd_wr_lvl_rmp_win = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, + .emif_rd_wr_lvl_ctl = 0x00000000, + .emif_rd_wr_exec_thresh = 0x00000305 }; /* Ext phy ctrl regs 1-35 */ @@ -127,28 +127,28 @@ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { }; static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { - .sdram_config_init = 0x61851b32, - .sdram_config = 0x61851b32, - .sdram_config2 = 0x08000000, - .ref_ctrl = 0x000040F1, - .ref_ctrl_final = 0x00001035, - .sdram_tim1 = 0xcccf36b3, - .sdram_tim2 = 0x308f7fda, - .sdram_tim3 = 0x407f88a8, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x5007190b, - .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1_init = 0x0024400b, - .emif_ddr_phy_ctlr_1 = 0x0e24400b, - .emif_ddr_ext_phy_ctrl_1 = 0x10040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00910091, - .emif_ddr_ext_phy_ctrl_3 = 0x00950095, - .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, - .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, - .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x80000000, - .emif_rd_wr_lvl_ctl = 0x00000000, - .emif_rd_wr_exec_thresh = 0x00000305 + .sdram_config_init = 0x61851b32, + .sdram_config = 0x61851b32, + .sdram_config2 = 0x08000000, + .ref_ctrl = 0x000040F1, + .ref_ctrl_final = 0x00001035, + .sdram_tim1 = 0xcccf36b3, + .sdram_tim2 = 0x308f7fda, + .sdram_tim3 = 0x407f88a8, + .read_idle_ctrl = 0x00050000, + .zq_config = 0x5007190b, + .temp_alert_config = 0x00000000, + .emif_ddr_phy_ctlr_1_init = 0x0024400b, + .emif_ddr_phy_ctlr_1 = 0x0e24400b, + .emif_ddr_ext_phy_ctrl_1 = 0x10040100, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, + .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, + .emif_rd_wr_lvl_rmp_win = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, + .emif_rd_wr_lvl_ctl = 0x00000000, + .emif_rd_wr_exec_thresh = 0x00000305 }; static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { @@ -221,7 +221,7 @@ struct vcores_data beagle_x15_volts = { .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, .mpu.addr = TPS659038_REG_ADDR_SMPS12, .mpu.pmic = &tps659038, - .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, + .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, .eve.value = VDD_EVE_DRA7, .eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE,