From patchwork Sun Mar 27 20:22:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Beniamino Galvani X-Patchwork-Id: 602382 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3qY7lS5qGDz9s5M for ; Mon, 28 Mar 2016 07:23:16 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=JDwburGC; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 166E5A74EE; Sun, 27 Mar 2016 22:23:10 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xDp-mB8QRE4S; Sun, 27 Mar 2016 22:23:09 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 18704A75EE; Sun, 27 Mar 2016 22:23:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5E3CAA74EE for ; Sun, 27 Mar 2016 22:22:53 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XvT0VDQqcIne for ; Sun, 27 Mar 2016 22:22:53 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by theia.denx.de (Postfix) with ESMTPS id 1DB94A74E9 for ; Sun, 27 Mar 2016 22:22:51 +0200 (CEST) Received: by mail-wm0-f67.google.com with SMTP id 139so10566745wmn.2 for ; Sun, 27 Mar 2016 13:22:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0EuPiJAjlwGPu2dllrEuLuhHv4XD2+F+niVYhxUV27Q=; b=JDwburGCtRMYpUAjj1nVgIyCstAMPXzgUvaM7a0j6apx3G0OgARN0rxtRyGSojrMhj /do5VMqXdDIyWAlebwYcRam7G1x4/Qmu4X5zotTn79SZVT1RJond17tmv9foQ3AwIiQi Y02yDQfSHabY6Y0JV2OudN2JPH7wxssi5pFqnVxFJlbZ2ZLpylQnXI0dfHeuUP88fP37 2IEXgTq2lOv/4eBEOBdwPw/JbEEK/rBqUR4kL0z3RtEKyzMu68rqVHC/Mu59lBFSoF6C nvVFLNr7N8hdcquD/dm2thqg4swpLH6Z9R7DHQ5t3Ghnl6ZT+a0P7aUiMgxMr5MCzn4B ipmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0EuPiJAjlwGPu2dllrEuLuhHv4XD2+F+niVYhxUV27Q=; b=OgdWBDPwt3NrQuapGQAJqy2VdNXqyoMVqtgp7a7fh0kbrF+eUtpX1VoMCy7tS24V9o 0ZURJAmPT/iqKJaCBRAwcIVcNzdPAsF33MTwmHs+GLFkgMfZKEmDvAiyij3C0zxidoV8 S2lqQSZrjiU3s+KayrZeAuVbS1+IU3x26To2E9HjPQDPlgPhGkWjk/h3+h69H/U0l+n7 7MDRwfmbrvFIye+A8DZPDU69zl8vSVv5VtSnodmkGRy6TViYdJ9i5K7BuukCybtiOyI+ 4HAKYrnQ26TziNbA/SQ4IIUYayL5hfyfZBDuXG04bxnG3rLcTEWaOtaAirZnMfo+F8TF POjw== X-Gm-Message-State: AD7BkJKomj+XKYW7qpJAS0PGhQmvw+sq2c8dRiETiJbyygBFFW1H0w0vJhc5M15p26/cJA== X-Received: by 10.194.103.198 with SMTP id fy6mr28722183wjb.48.1459110171278; Sun, 27 Mar 2016 13:22:51 -0700 (PDT) Received: from shire.fritz.box ([95.236.43.82]) by smtp.gmail.com with ESMTPSA id jo6sm21667503wjb.48.2016.03.27.13.22.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 27 Mar 2016 13:22:50 -0700 (PDT) From: Beniamino Galvani To: u-boot@lists.denx.de Date: Sun, 27 Mar 2016 22:22:12 +0200 Message-Id: <1459110135-10837-3-git-send-email-b.galvani@gmail.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1459110135-10837-1-git-send-email-b.galvani@gmail.com> References: <1459110135-10837-1-git-send-email-b.galvani@gmail.com> MIME-Version: 1.0 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Carlo Caione Subject: [U-Boot] [PATCH 2/5] arm: dts: import Meson files X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Import the device tree file for Meson GXBB from linux kernel and the one for ODROID-C2 posted to the arm-kernel list [1]. [1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/487948 Signed-off-by: Beniamino Galvani --- arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-odroidc2.dts | 65 +++++++++++ arch/arm/dts/meson-gxbb.dtsi | 211 +++++++++++++++++++++++++++++++++++ 3 files changed, 278 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts create mode 100644 arch/arm/dts/meson-gxbb.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 50bcc0b..46d4eb0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-jerry.dtb \ rk3288-rock2-square.dtb \ rk3036-sdk.dtb +dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxbb-odroidc2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts new file mode 100644 index 0000000..4a468be --- /dev/null +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "meson-gxbb.dtsi" + +/ { + compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; + model = "Hardkernel ODROID-C2"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +&uart_AO { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi new file mode 100644 index 0000000..f714f8d --- /dev/null +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2016 Andreas Färber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +/ { + compatible = "amlogic,meson-gxbb"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus@c1100000 { + compatible = "simple-bus"; + reg = <0x0 0xc1100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; + + uart_A: serial@84c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x084c0 0x0 0x14>; + interrupts = ; + clocks = <&xtal>; + status = "disabled"; + }; + + timer@9980 { + compatible = "amlogic,meson6-timer"; + reg = <0x0 0x09980 0x0 0x18>; /*XXX*/ + interrupts = ; + status = "disabled"; + }; + }; + + gic: interrupt-controller@c4301000 { + compatible = "arm,gic-400"; + reg = <0x0 0xc4301000 0 0x1000>, + <0x0 0xc4302000 0 0x2000>, + <0x0 0xc4304000 0 0x2000>, + <0x0 0xc4306000 0 0x2000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + aobus: aobus@c8100000 { + compatible = "simple-bus"; + reg = <0x0 0xc8100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; + + uart_AO: serial@4c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x004c0 0x0 0x14>; + interrupts = ; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + apb: apb@d0000000 { + compatible = "simple-bus"; + reg = <0x0 0xd0000000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; + + mmc0: mmc@70000 { + compatible = "amlogic,meson-mmc"; + reg = <0x0 0x0070000 0x0 0x2000>; + interrupts = <0 216 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + mmc1: mmc@72000 { + compatible = "amlogic,meson-mmc"; + reg = <0x0 0x0072000 0x0 0x2000>; + interrupts = <0 217 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + mmc2: mmc@74000 { + compatible = "amlogic,meson-mmc"; + reg = <0x0 0x0074000 0x0 0x2000>; + interrupts = <0 218 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + }; + }; +};