From patchwork Mon Jan 4 14:01:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Purna Chandra Mandal X-Patchwork-Id: 562398 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 509031402D8 for ; Tue, 5 Jan 2016 01:03:53 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ECA9D4B873; Mon, 4 Jan 2016 15:03:19 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BoRfEGtyE650; Mon, 4 Jan 2016 15:03:19 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A3DB54B829; Mon, 4 Jan 2016 15:03:19 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AF6BE4B7CC for ; Mon, 4 Jan 2016 15:02:52 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VHqEp4V5oZJX for ; Mon, 4 Jan 2016 15:02:52 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from email.microchip.com (exsmtp03.microchip.com [198.175.253.49]) by theia.denx.de (Postfix) with ESMTPS id 0A9214B80A for ; Mon, 4 Jan 2016 15:02:49 +0100 (CET) Received: from centos7pc (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.181.6; Mon, 4 Jan 2016 07:02:47 -0700 Message-ID: <1451916098.27601.127.camel@microchip.com> From: Purna Chandra Mandal To: Date: Mon, 4 Jan 2016 19:31:38 +0530 Organization: Microchip India Technology Pvt Ltd X-Mailer: Evolution 3.12.11 (3.12.11-15.el7) MIME-Version: 1.0 Cc: Andrei Pistirica , purna.mandal@microchip.com, Sandeep Sheriker Mallikarjun , panto@antoniou-consulting.com Subject: [U-Boot] [PATCH v2 08/13] drivers: mmc: add driver for Microchip PIC32 SDHCI controller. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" PIC32 architecture has in-built SDHCI controller. This driver implements platform specific glue to use common SDHCI functionality. Signed-off-by: Andrei Pistirica Signed-off-by: Sandeep Sheriker Mallikarjun Signed-off-by: Purna Chandra Mandal --- Changes in v2: - drop SDHCI shared bus configuration (for shared interrupt-and-clock pins) drivers/mmc/Kconfig | 6 +++++ drivers/mmc/Makefile | 2 +- drivers/mmc/pic32_sdhci.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/mmc/sdhci.c | 12 +++++++++ 4 files changed, 82 insertions(+), 1 deletion(-) create mode 100644 drivers/mmc/pic32_sdhci.c diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index ceae7bc..0b6f54b 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -31,4 +31,10 @@ config SH_SDHI help Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform +config PIC32_SDHCI + bool "Microchip PIC32 on-chip SDHCI support" + depends on DM_MMC && MACH_PIC32 + help + Support for the on-chip SDHCI support on Microchip PIC32 platforms. + endmenu diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 5d35705..c9c3e3e 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -48,4 +48,4 @@ obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o else obj-$(CONFIG_GENERIC_MMC) += mmc_write.o endif - +obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c new file mode 100644 index 0000000..9eb603e --- /dev/null +++ b/drivers/mmc/pic32_sdhci.c @@ -0,0 +1,63 @@ +/* + * Support of SDHCI for Microchip PIC32 SoC. + * + * Copyright (C) 2015 Microchip Technology Inc. + * Andrei Pistirica + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +static int pic32_sdhci_probe(struct udevice *dev) +{ + struct sdhci_host *host = dev_get_priv(dev); + u32 f_min_max[2]; + int ret; + + ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, + "clock-freq-min-max", f_min_max, 2); + if (ret) { + printf("sdhci: clock-freq-min-max not found\n"); + return ret; + } + + return add_sdhci(host, f_min_max[1], f_min_max[0]); +} + +static int pic32_sdhci_ofdata_to_platdata(struct udevice *dev) +{ + struct sdhci_host *host = dev_get_priv(dev); + fdt_addr_t addr; + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + host->name = (char *)dev->name; + host->ioaddr = pic32_ioremap(addr); + host->quirks = SDHCI_QUIRK_NO_HISPD_BIT; + host->bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "bus-width", 4); + return 0; +} + +static const struct udevice_id pic32_sdhci_ids[] = { + { .compatible = "microchip,pic32mzda-sdhci" }, + { } +}; + +U_BOOT_DRIVER(pic32_sdhci_drv) = { + .name = "pic32_sdhci", + .id = UCLASS_MMC, + .of_match = pic32_sdhci_ids, + .probe = pic32_sdhci_probe, + .ofdata_to_platdata = pic32_sdhci_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct sdhci_host), +}; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 02d71b9..f32fe67 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -424,6 +424,18 @@ static void sdhci_set_ios(struct mmc *mmc) if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) ctrl &= ~SDHCI_CTRL_HISPD; +#if defined(CONFIG_PIC32_SDHCI) + /* + * In PIC32MZ[DA] due to h/w bug SDHCI fails detecting card when JTAG + * is not connected. + * To work-around this problem: + * - set Card_Detect_Signal_Selection bit in SDHCI_Host_Control register + * - clear Card_Detect_Test_Level bit in SDHCI_Host_Control register + */ + ctrl |= SDHCI_CTRL_CD_TEST; + ctrl &= ~SDHCI_CTRL_CD_TEST_INS; +#endif + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); }