From patchwork Wed Oct 21 23:59:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Fleming X-Patchwork-Id: 534139 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6CD36141309 for ; Thu, 22 Oct 2015 10:59:36 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=U1isNtpn; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A22DCA744E; Thu, 22 Oct 2015 01:59:31 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id T54Gc1RYX3CH; Thu, 22 Oct 2015 01:59:31 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B240B4B84E; Thu, 22 Oct 2015 01:59:26 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 24F494B836 for ; Thu, 22 Oct 2015 01:59:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BH6EGDANLcxE for ; Thu, 22 Oct 2015 01:59:19 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ob0-f172.google.com (mail-ob0-f172.google.com [209.85.214.172]) by theia.denx.de (Postfix) with ESMTPS id 40DDF4B834 for ; Thu, 22 Oct 2015 01:59:16 +0200 (CEST) Received: by obctp1 with SMTP id tp1so28382708obc.2 for ; Wed, 21 Oct 2015 16:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7D5WoNVWFjAo11zaYBaVv/fce9GzxlPPSJgrj3VaCEw=; b=U1isNtpnCR/yKTxVDkPhsZzrjbjaHZehGzSRchWVy3en0g2enlWQ0Qy49C0RZ0SJ8+ I+drHhTh09LWwL2gaS3eB5SGAZ7T/u4zwt55shHRZ+CT5mLidrsIhrEQorYjtMqql/WE EvAQJMu0juuCR/GFm3KZmrhKwSxxQ6GYSMK9kVn6NtZwDCm/4eT4DNqQb94Eq5YcUwO0 ZDC2r7/CnmTSGpQ6km2SlYyS6efsoBg2Zad667tX62zMJFVpr+LbJXWFHyYdHvGD8RaY lS9lFNzYF7CmUCyNBGAoDfHx19ilBYvZuS3lHTUAqB9EDt8GVOWV9bK7/mCxIbyll09H 1DJw== X-Received: by 10.182.111.167 with SMTP id ij7mr8312581obb.85.1445471955075; Wed, 21 Oct 2015 16:59:15 -0700 (PDT) Received: from localhost.localdomain (72-48-211-141.dyn.grandenetworks.net. [72.48.211.141]) by smtp.googlemail.com with ESMTPSA id x68sm4765203oia.3.2015.10.21.16.59.14 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Oct 2015 16:59:14 -0700 (PDT) From: Andy Fleming To: u-boot@lists.denx.de Date: Wed, 21 Oct 2015 18:59:06 -0500 Message-Id: <1445471947-4270-2-git-send-email-afleming@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445471947-4270-1-git-send-email-afleming@gmail.com> References: <1445471947-4270-1-git-send-email-afleming@gmail.com> Cc: trini@konsulko.com, yorksun@freescale.com Subject: [U-Boot] [PATCH 1/2] rtc: Add MCP79411 support to DS1307 rtc driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The code is from Adrian Cox, and is patterned after similar support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This chip is used on the Cyrus board from Varisys. Signed-off-by: Andy Fleming --- drivers/rtc/Makefile | 2 +- drivers/rtc/ds1307.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 3092de1..fc38a3f 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -4,7 +4,6 @@ # # SPDX-License-Identifier: GPL-2.0+ # - #ccflags-y += -DDEBUG obj-$(CONFIG_DM_RTC) += rtc-uclass.o @@ -37,6 +36,7 @@ obj-$(CONFIG_RTC_M48T35A) += m48t35ax.o obj-$(CONFIG_RTC_MAX6900) += max6900.o obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o obj-$(CONFIG_RTC_MC146818) += mc146818.o +obj-$(CONFIG_RTC_MCP79411) += ds1307.o obj-$(CONFIG_MCFRTC) += mcfrtc.o obj-$(CONFIG_RTC_MK48T59) += mk48t59.o obj-$(CONFIG_RTC_MPC5200) += mpc5xxx.o diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c index 03ab1a8..3be1da6 100644 --- a/drivers/rtc/ds1307.c +++ b/drivers/rtc/ds1307.c @@ -58,6 +58,10 @@ #define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */ #define RTC_CTL_BIT_OUT 0x80 /* Output Control */ +/* MCP7941X-specific bits */ +#define MCP7941X_BIT_ST 0x80 +#define MCP7941X_BIT_VBATEN 0x08 + static uchar rtc_read (uchar reg); static void rtc_write (uchar reg, uchar val); @@ -69,6 +73,9 @@ int rtc_get (struct rtc_time *tmp) int rel = 0; uchar sec, min, hour, mday, wday, mon, year; +#ifdef CONFIG_RTC_MCP79411 +read_rtc: +#endif sec = rtc_read (RTC_SEC_REG_ADDR); min = rtc_read (RTC_MIN_REG_ADDR); hour = rtc_read (RTC_HR_REG_ADDR); @@ -81,6 +88,7 @@ int rtc_get (struct rtc_time *tmp) "hr: %02x min: %02x sec: %02x\n", year, mon, mday, wday, hour, min, sec); +#ifdef CONFIG_RTC_DS1307 if (sec & RTC_SEC_BIT_CH) { printf ("### Warning: RTC oscillator has stopped\n"); /* clear the CH flag */ @@ -88,6 +96,23 @@ int rtc_get (struct rtc_time *tmp) rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); rel = -1; } +#endif + +#ifdef CONFIG_RTC_MCP79411 + /* make sure that the backup battery is enabled */ + if (!(wday & MCP7941X_BIT_VBATEN)) { + rtc_write(RTC_DAY_REG_ADDR, + wday | MCP7941X_BIT_VBATEN); + } + + /* clock halted? turn it on, so clock can tick. */ + if (!(sec & MCP7941X_BIT_ST)) { + rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST); + printf("Started RTC\n"); + goto read_rtc; + } +#endif + tmp->tm_sec = bcd2bin (sec & 0x7F); tmp->tm_min = bcd2bin (min & 0x7F); @@ -121,11 +146,20 @@ int rtc_set (struct rtc_time *tmp) rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon)); +#ifdef CONFIG_RTC_MCP79411 + rtc_write (RTC_DAY_REG_ADDR, + bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN); +#else rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); +#endif rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); +#ifdef CONFIG_RTC_MCP79411 + rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST); +#else rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); +#endif return 0; }