From patchwork Sun Oct 4 22:18:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 526212 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A15261402B4 for ; Mon, 5 Oct 2015 09:25:52 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9E95F4B7EA; Mon, 5 Oct 2015 00:25:48 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oBDFVoQwVef8; Mon, 5 Oct 2015 00:25:48 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 05B1F4B78E; Mon, 5 Oct 2015 00:25:48 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6ED684B7D6 for ; Mon, 5 Oct 2015 00:25:45 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KtojE4cR_VyU for ; Mon, 5 Oct 2015 00:25:45 +0200 (CEST) X-Greylist: delayed 423 seconds by postgrey-1.34 at theia; Mon, 05 Oct 2015 00:25:42 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.mleia.com (li271-223.members.linode.com [178.79.152.223]) by theia.denx.de (Postfix) with ESMTPS id 3D7594B77E for ; Mon, 5 Oct 2015 00:25:42 +0200 (CEST) Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id 9A59B10DFE9; Sun, 4 Oct 2015 23:26:53 +0100 (BST) Received: from meadow.local (unknown [31.216.236.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mleia.com (Postfix) with ESMTPSA id 722ED10DFE2; Sun, 4 Oct 2015 23:26:53 +0100 (BST) From: Vladimir Zapolskiy To: Tom Rini Date: Sun, 4 Oct 2015 23:18:24 +0100 Message-Id: <1443997104-4881-1-git-send-email-vz@mleia.com> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20151004_232653_654311_6FDD2633 X-CRM114-Status: GOOD ( 13.45 ) Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH] lpc32xx: remove surplus clock cycle in PL175 WAIT_OEN config X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" According to ARM PrimeCell PL175 documentation WAIT_OEN config value is defined without any additional clocks added to the value set by a client, the change fixes the wrong interface to WAIT_OEN config. The change also touches a single user of LPC32xx EMC and corrects configured "output enable delay" value on its side according to the changed interface. No functional change intended. Signed-off-by: Vladimir Zapolskiy --- arch/arm/include/asm/arch-lpc32xx/emc.h | 2 +- board/timll/devkit3250/devkit3250.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-lpc32xx/emc.h b/arch/arm/include/asm/arch-lpc32xx/emc.h index 1a2bab2..f70faf8 100644 --- a/arch/arm/include/asm/arch-lpc32xx/emc.h +++ b/arch/arm/include/asm/arch-lpc32xx/emc.h @@ -70,7 +70,7 @@ struct emc_regs { /* Static Memory Delay Registers */ #define EMC_STAT_WAITWEN(n) (((n) - 1) & 0x0F) -#define EMC_STAT_WAITOEN(n) (((n) - 1) & 0x0F) +#define EMC_STAT_WAITOEN(n) ((n) & 0x0F) #define EMC_STAT_WAITRD(n) (((n) - 1) & 0x1F) #define EMC_STAT_WAITPAGE(n) (((n) - 1) & 0x1F) #define EMC_STAT_WAITWR(n) (((n) - 2) & 0x1F) diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c index 4b3c94e..386d0cd 100644 --- a/board/timll/devkit3250/devkit3250.c +++ b/board/timll/devkit3250/devkit3250.c @@ -62,7 +62,7 @@ int board_init(void) /* Change the NOR timings to optimum value to get maximum bandwidth */ emc->stat[0].waitwen = EMC_STAT_WAITWEN(1); - emc->stat[0].waitoen = EMC_STAT_WAITOEN(1); + emc->stat[0].waitoen = EMC_STAT_WAITOEN(0); emc->stat[0].waitrd = EMC_STAT_WAITRD(12); emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12); emc->stat[0].waitwr = EMC_STAT_WAITWR(5);