From patchwork Mon Sep 7 20:13:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 515243 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C3F9B1400B7 for ; Tue, 8 Sep 2015 06:13:43 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C58734B74D; Mon, 7 Sep 2015 22:13:40 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BlnJbNTKkCGy; Mon, 7 Sep 2015 22:13:40 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C8B174B786; Mon, 7 Sep 2015 22:13:38 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7901B4B74D for ; Mon, 7 Sep 2015 22:13:31 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id N-GlsFlICjpU for ; Mon, 7 Sep 2015 22:13:31 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f41.google.com (mail-pa0-f41.google.com [209.85.220.41]) by theia.denx.de (Postfix) with ESMTPS id 086284B746 for ; Mon, 7 Sep 2015 22:13:28 +0200 (CEST) Received: by padhk3 with SMTP id hk3so18911749pad.3 for ; Mon, 07 Sep 2015 13:13:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ArS65sU8aAmTfaAYguJPpk6InjrRPS+dGHcnNZEPaxI=; b=UZcQ2mZu4Yw58NtDnNnhDt5k+euXGalBy5m+msjSyjryuZEOOq7wpzVI+wxa0vaQ+x ITv6OuFylnoHye8arnTgYLj96xVdMH/iieDAApZ8AFm0rx9U2Z1Ri5WMKnpBhMW4b9+a txBvKekIToeGPuO5I95gMoKQhWGCW67990SJGfC4SAhgZK3mNyWPERyoJImRBzJ9Rniy nswb+P2fm+X52vuJA8nOL0WXXKLA2NUiZ78vbiP+X3+FAAhdeUkxAwSKIaYLZgoSShck ZAuEV1Ekv7V2GG/zjwpwsauaxNrwfQ6TleJmdKny9zeMv9k6eWFt4Jnu5wfyD38b+arY TDVg== X-Received: by 10.68.224.198 with SMTP id re6mr8337427pbc.70.1441656806256; Mon, 07 Sep 2015 13:13:26 -0700 (PDT) Received: from localhost.localdomain ([1.39.96.138]) by smtp.gmail.com with ESMTPSA id zf5sm725695pbc.36.2015.09.07.13.13.23 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 07 Sep 2015 13:13:25 -0700 (PDT) From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 8 Sep 2015 01:43:02 +0530 Message-Id: <1441656783-8658-2-git-send-email-jteki@openedev.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1441656783-8658-1-git-send-email-jteki@openedev.com> References: <1441656783-8658-1-git-send-email-jteki@openedev.com> Cc: Jagan Teki Subject: [U-Boot] [PATCH 2/3] spi: zynq_spi: Fix to configure CPOL, CPHA mask X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" priv->mode is initialized when .set_speed triggers with mode value, so checking mode for configuring CPOL, CPHA using priv->mode is invalid hence use mode from .set_speed argument, and at the end priv->mode will initialized with mode. This patch also replaces formatting string to use speed instead of mode in .set_speed ops. Signed-off-by: Jagan Teki --- drivers/spi/zynq_spi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index d6057e6..65a9633 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -278,7 +278,8 @@ static int zynq_spi_set_speed(struct udevice *bus, uint speed) writel(confr, ®s->cr); priv->freq = speed; - debug("zynq_spi_set_speed: regs=%p, mode=%d\n", priv->regs, priv->freq); + debug("zynq_spi_set_speed: regs=%p, speed=%d\n", + priv->regs, priv->freq); return 0; } @@ -293,9 +294,9 @@ static int zynq_spi_set_mode(struct udevice *bus, uint mode) confr = readl(®s->cr); confr &= ~(ZYNQ_SPI_CR_CPHA_MASK | ZYNQ_SPI_CR_CPOL_MASK); - if (priv->mode & SPI_CPHA) + if (mode & SPI_CPHA) confr |= ZYNQ_SPI_CR_CPHA_MASK; - if (priv->mode & SPI_CPOL) + if (mode & SPI_CPOL) confr |= ZYNQ_SPI_CR_CPOL_MASK; writel(confr, ®s->cr);