From patchwork Tue Aug 25 02:49:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 510369 X-Patchwork-Delegate: hdegoede@redhat.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 91C24140332 for ; Tue, 25 Aug 2015 12:57:55 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 28AA74B652; Tue, 25 Aug 2015 04:57:52 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YhbD-ZzMDGvV; Tue, 25 Aug 2015 04:57:51 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 663214B656; Tue, 25 Aug 2015 04:57:51 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D7DAB4B656 for ; Tue, 25 Aug 2015 04:57:47 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hIz818nY74He for ; Tue, 25 Aug 2015 04:57:47 +0200 (CEST) X-Greylist: delayed 494 seconds by postgrey-1.34 at theia; Tue, 25 Aug 2015 04:57:44 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp.csie.ntu.edu.tw (smtp.csie.ntu.edu.tw [140.112.30.61]) by theia.denx.de (Postfix) with ESMTP id 1E6284B652 for ; Tue, 25 Aug 2015 04:57:44 +0200 (CEST) Received: from mirror2.csie.ntu.edu.tw (mirror2.csie.ntu.edu.tw [140.112.30.76]) (Authenticated sender: b93043) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 877FC20796; Tue, 25 Aug 2015 10:49:25 +0800 (CST) Received: by mirror2.csie.ntu.edu.tw (Postfix, from userid 1000) id 6EBB45F8C2; Tue, 25 Aug 2015 10:49:25 +0800 (CST) From: Chen-Yu Tsai To: Hans de Goede , Ian Campbell Date: Tue, 25 Aug 2015 10:49:19 +0800 Message-Id: <1440470959-29744-1-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.5.0 Cc: Marc Zyngier , u-boot@lists.denx.de Subject: [U-Boot] [PATCH] sunxi: Enable non-secure access to RTC on sun6i (A31s) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" On the A31s the RTC is by default secured. Thus when u-boot loads the kernel in non-secure world, the RTC is unavailable. The SoC has a TrustZone Protection Controller, which can be used to enable non-secure access to the RTC. On the A31 the TZPC doesn't seem to do anything, i.e. changes to its register contents do not affect access to the RTC. Signed-off-by: Chen-Yu Tsai --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/board.c | 5 +++++ arch/arm/cpu/armv7/sunxi/tzpc.c | 18 ++++++++++++++++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 23 +++++++++++++++++++++++ 4 files changed, 47 insertions(+) create mode 100644 arch/arm/cpu/armv7/sunxi/tzpc.c create mode 100644 arch/arm/include/asm/arch-sunxi/tzpc.h diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 76c7e55..459d5d8 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o obj-$(CONFIG_MACH_SUN7I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN8I) += clock_sun6i.o obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o +obj-$(CONFIG_MACH_SUN6I) += tzpc.o obj-$(CONFIG_AXP152_POWER) += pmic_bus.o obj-$(CONFIG_AXP209_POWER) += pmic_bus.o diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index f01846e..b40198b 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -115,6 +116,10 @@ void s_init(void) "orr r0, r0, #1 << 6\n" "mcr p15, 0, r0, c1, c0, 1\n"); #endif +#if defined CONFIG_MACH_SUN6I + /* Enable non-secure access to the RTC */ + tzpc_init(); +#endif clock_init(); timer_init(); diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c new file mode 100644 index 0000000..5c9c69b --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c @@ -0,0 +1,18 @@ +/* + * (C) Copyright 2015 Chen-Yu Tsai + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +/* Configure Trust Zone Protection Controller */ +void tzpc_init(void) +{ + struct sunxi_tzpc *tzpc = (struct sunxi_tzpc *)SUNXI_TZPC_BASE; + + /* Enable non-secure access to the RTC */ + writel(SUNXI_TZPC_DECPORT0_RTC, &tzpc->decport0_set); +} diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h new file mode 100644 index 0000000..ba4d43b --- /dev/null +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -0,0 +1,23 @@ +/* + * (C) Copyright 2015 Chen-Yu Tsai + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_TZPC_H +#define _SUNXI_TZPC_H + +#ifndef __ASSEMBLY__ +struct sunxi_tzpc { + u32 r0size; /* 0x00 Size of secure RAM region */ + u32 decport0_status; /* 0x04 Status of decode protection port 0 */ + u32 decport0_set; /* 0x08 Set decode protection port 0 */ + u32 decport0_clear; /* 0x0c Clear decode protection port 0 */ +}; +#endif + +#define SUNXI_TZPC_DECPORT0_RTC (1 << 1) + +void tzpc_init(void); + +#endif /* _SUNXI_TZPC_H */