From patchwork Fri Jun 19 12:18:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Albert ARIBAUD (3ADEV)" X-Patchwork-Id: 486679 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A98991401F0 for ; Fri, 19 Jun 2015 22:19:31 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 057664B65A; Fri, 19 Jun 2015 14:19:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mwtDwD-8oTUO; Fri, 19 Jun 2015 14:19:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EF1694B662; Fri, 19 Jun 2015 14:19:17 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F244B4B62A for ; Fri, 19 Jun 2015 14:19:11 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hJKrdJ9IZcRy for ; Fri, 19 Jun 2015 14:19:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp2-g21.free.fr (smtp2-g21.free.fr [212.27.42.2]) by theia.denx.de (Postfix) with ESMTPS id B928F4B61C for ; Fri, 19 Jun 2015 14:19:11 +0200 (CEST) Received: from localhost.localdomain (unknown [82.235.144.2]) (Authenticated sender: aribaud.smtp) by smtp2-g21.free.fr (Postfix) with ESMTPSA id 0951A4B0289; Fri, 19 Jun 2015 14:19:04 +0200 (CEST) From: "Albert ARIBAUD (3ADEV)" To: u-boot@lists.denx.de Date: Fri, 19 Jun 2015 14:18:29 +0200 Message-Id: <1434716311-26189-4-git-send-email-albert.aribaud@3adev.fr> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1434716311-26189-3-git-send-email-albert.aribaud@3adev.fr> References: <1434716311-26189-1-git-send-email-albert.aribaud@3adev.fr> <1434716311-26189-2-git-send-email-albert.aribaud@3adev.fr> <1434716311-26189-3-git-send-email-albert.aribaud@3adev.fr> Cc: "Albert ARIBAUD \(3ADEV\)" , Tom Rini Subject: [U-Boot] [PATCH 3/5] i2c: fix vf610 support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add support in mxc_i2c driver, iomux_v3 and vf610 architecture for the four I2C instances available in VF610. Signed-off-by: Albert ARIBAUD (3ADEV) --- arch/arm/include/asm/arch-vf610/crm_regs.h | 3 +++ arch/arm/include/asm/arch-vf610/imx-regs.h | 3 +++ arch/arm/include/asm/arch-vf610/iomux-vf610.h | 11 +++++++---- arch/arm/include/asm/imx-common/iomux-v3.h | 2 ++ drivers/i2c/mxc_i2c.c | 3 ++- 5 files changed, 17 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h index fdb45e9..a46e396 100644 --- a/arch/arm/include/asm/arch-vf610/crm_regs.h +++ b/arch/arm/include/asm/arch-vf610/crm_regs.h @@ -207,6 +207,7 @@ struct anadig_reg { #define CCM_CCGR4_CCM_CTRL_MASK (0x3 << 22) #define CCM_CCGR4_GPC_CTRL_MASK (0x3 << 24) #define CCM_CCGR4_I2C0_CTRL_MASK (0x3 << 12) +#define CCM_CCGR4_I2C1_CTRL_MASK (0x3 << 14) #define CCM_CCGR6_OCOTP_CTRL_MASK (0x3 << 10) #define CCM_CCGR6_DSPI2_CTRL_MASK (0x3 << 24) #define CCM_CCGR6_DSPI3_CTRL_MASK (0x3 << 26) @@ -216,6 +217,8 @@ struct anadig_reg { #define CCM_CCGR9_FEC0_CTRL_MASK 0x3 #define CCM_CCGR9_FEC1_CTRL_MASK (0x3 << 2) #define CCM_CCGR10_NFC_CTRL_MASK 0x3 +#define CCM_CCGR10_I2C2_CTRL_MASK (0x3 << 12) +#define CCM_CCGR10_I2C3_CTRL_MASK (0x3 << 14) #define ANADIG_PLL7_CTRL_BYPASS (1 << 16) #define ANADIG_PLL7_CTRL_ENABLE (1 << 13) diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index 7df3b1e..4366985 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -75,6 +75,9 @@ #define ESAI_FIFO_BASE_ADDR (AIPS0_BASE_ADDR + 0x00063000) #define WDOG_BASE_ADDR (AIPS0_BASE_ADDR + 0x00065000) #define I2C1_BASE_ADDR (AIPS0_BASE_ADDR + 0x00066000) +#define I2C2_BASE_ADDR (AIPS0_BASE_ADDR + 0x00067000) +#define I2C3_BASE_ADDR (AIPS0_BASE_ADDR + 0x000E6000) +#define I2C4_BASE_ADDR (AIPS0_BASE_ADDR + 0x000E7000) #define WKUP_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006A000) #define CCM_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006B000) #define GPC_BASE_ADDR (AIPS0_BASE_ADDR + 0x0006C000) diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h index 019307b..0e2bd53 100644 --- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h +++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h @@ -20,7 +20,8 @@ #define VF610_DDR_PAD_CTRL_1 (PAD_CTL_DSE_25ohm | \ PAD_CTL_INPUT_DIFFERENTIAL) #define VF610_I2C_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_50ohm | \ - PAD_CTL_SPEED_HIGH | PAD_CTL_OBE_IBE_ENABLE) + PAD_CTL_SPEED_HIGH | PAD_CTL_ODE | \ + PAD_CTL_OBE_IBE_ENABLE) #define VF610_NFC_IO_PAD_CTRL (PAD_CTL_SPEED_MED | PAD_CTL_SRE | \ PAD_CTL_DSE_50ohm | PAD_CTL_PUS_47K_UP | \ PAD_CTL_OBE_IBE_ENABLE) @@ -110,6 +111,8 @@ enum { VF610_PAD_PTA29__ESDHC1_DAT3 = IOMUX_PAD(0x004c, 0x004c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL), VF610_PAD_PTB14__I2C0_SCL = IOMUX_PAD(0x0090, 0x0090, 2, 0x033c, 1, VF610_I2C_PAD_CTRL), VF610_PAD_PTB15__I2C0_SDA = IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, VF610_I2C_PAD_CTRL), + VF610_PAD_PTA22__I2C2_SCL = IOMUX_PAD(0x0030, 0x0030, 6, 0x034c, 0, VF610_I2C_PAD_CTRL), + VF610_PAD_PTA23__I2C2_SDA = IOMUX_PAD(0x0034, 0x0034, 6, 0x0350, 0, VF610_I2C_PAD_CTRL), VF610_PAD_PTD31__NF_IO15 = IOMUX_PAD(0x00fc, 0x00fc, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD31__GPIO_63 = IOMUX_PAD(0x00fc, 0x00fc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD30__NF_IO14 = IOMUX_PAD(0x0100, 0x0100, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), @@ -146,10 +149,10 @@ enum { VF610_PAD_PTD12__GPIO_91 = IOMUX_PAD(0x016c, 0x016c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD13__GPIO_92 = IOMUX_PAD(0x0170, 0x0170, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD22__NF_IO6 = IOMUX_PAD(0x0120, 0x0120, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), - VF610_PAD_PTD21__NF_IO5 = IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), - VF610_PAD_PTD20__NF_IO4 = IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD21__NF_IO5 = IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD20__NF_IO4 = IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD19__NF_IO3 = IOMUX_PAD(0x012c, 0x012c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), - VF610_PAD_PTD18__NF_IO2 = IOMUX_PAD(0x0130, 0x0130, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), + VF610_PAD_PTD18__NF_IO2 = IOMUX_PAD(0x0130, 0x0130, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD17__NF_IO1 = IOMUX_PAD(0x0134, 0x0134, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD16__NF_IO0 = IOMUX_PAD(0x0138, 0x0138, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTB24__NF_WE_B = IOMUX_PAD(0x0178, 0x0178, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL), diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index 2581019..5cde90f 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -127,6 +127,8 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_SRE (1 << 11) +#define PAD_CTL_ODE (1 << 10) + #define PAD_CTL_DSE_150ohm (1 << 6) #define PAD_CTL_DSE_50ohm (3 << 6) #define PAD_CTL_DSE_25ohm (6 << 6) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index b3c50aa..f1056e2 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -523,7 +523,8 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, #endif static struct mxc_i2c_bus mxc_i2c_buses[] = { -#if defined(CONFIG_LS102XA) || defined(CONFIG_FSL_LSCH3) +#if defined(CONFIG_LS102XA) || defined(CONFIG_FSL_LSCH3) || \ + defined(CONFIG_VF610) { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG },