From patchwork Fri Jun 12 10:52:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 483488 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id CEF501401DA for ; Fri, 12 Jun 2015 20:54:02 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E14794B668; Fri, 12 Jun 2015 12:53:57 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id s9LeD-eTZxdz; Fri, 12 Jun 2015 12:53:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 50F244B66A; Fri, 12 Jun 2015 12:53:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0D2C44B62B for ; Fri, 12 Jun 2015 12:53:50 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FPYrN-8rQYN3 for ; Fri, 12 Jun 2015 12:53:49 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gagarine.paulk.fr (gagarine.paulk.fr [109.190.93.129]) by theia.denx.de (Postfix) with ESMTPS id BA1EA4B61C for ; Fri, 12 Jun 2015 12:53:49 +0200 (CEST) Received: by gagarine.paulk.fr (Postfix, from userid 65534) id 362991FE66; Fri, 12 Jun 2015 12:53:49 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on gagarine.paulk.fr X-Spam-Level: ** X-Spam-Status: No, score=2.1 required=5.0 tests=RDNS_NONE,UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from localhost.localdomain (unknown [192.168.1.22]) by gagarine.paulk.fr (Postfix) with ESMTP id 446971FE51; Fri, 12 Jun 2015 12:53:26 +0200 (CEST) From: Paul Kocialkowski To: u-boot@lists.denx.de Date: Fri, 12 Jun 2015 12:52:55 +0200 Message-Id: <1434106381-1397-3-git-send-email-contact@paulk.fr> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1434106381-1397-1-git-send-email-contact@paulk.fr> References: <1434106381-1397-1-git-send-email-contact@paulk.fr> Cc: Marek Vasut , Tom Rini , =?UTF-8?q?Pali=20Roh=C3=A1r?= Subject: [U-Boot] [PATCH v3 2/8] omap: SPL boot devices cleanup and completion X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This cleans up the SPL boot devices for omap platforms and introduces support for missing boot devices. Signed-off-by: Paul Kocialkowski --- arch/arm/include/asm/arch-am33xx/spl.h | 94 +++++++++++++++++++--------------- arch/arm/include/asm/arch-omap3/spl.h | 18 ++++--- arch/arm/include/asm/arch-omap4/spl.h | 20 ++++---- arch/arm/include/asm/arch-omap5/spl.h | 23 +++++---- 4 files changed, 88 insertions(+), 67 deletions(-) diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index e756418..4ed8597 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -7,51 +7,65 @@ #ifndef _ASM_ARCH_SPL_H_ #define _ASM_ARCH_SPL_H_ -#if defined(CONFIG_TI816X) -#define BOOT_DEVICE_XIP 2 -#define BOOT_DEVICE_NAND 3 -#define BOOT_DEVICE_MMC1 6 -#define BOOT_DEVICE_MMC2 5 +#define BOOT_DEVICE_NONE 0x00 +#define BOOT_DEVICE_MMC2_2 0xFF + +#if defined(CONFIG_TI814X) +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x05 +#define BOOT_DEVICE_NAND_I2C 0x06 +#define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */ +#define BOOT_DEVICE_MMC1 0x09 +#define BOOT_DEVICE_SPI 0x15 +#define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USBETH 0x44 +#define BOOT_DEVICE_CPGMAC 0x46 + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 +#elif defined(CONFIG_TI816X) +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x03 +#define BOOT_DEVICE_ONENAD 0x04 +#define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */ +#define BOOT_DEVICE_MMC1 0x06 #define BOOT_DEVICE_UART 0x43 -#elif defined(CONFIG_AM43XX) -#define BOOT_DEVICE_NOR 1 -#define BOOT_DEVICE_NAND 5 -#define BOOT_DEVICE_MMC1 7 -#define BOOT_DEVICE_MMC2 8 -#define BOOT_DEVICE_SPI 10 -#define BOOT_DEVICE_USB 13 -#define BOOT_DEVICE_UART 65 -#define BOOT_DEVICE_CPGMAC 71 -#else -#define BOOT_DEVICE_XIP 2 -#define BOOT_DEVICE_NAND 5 -#define BOOT_DEVICE_NAND_I2C 6 -#if defined(CONFIG_AM33XX) -#define BOOT_DEVICE_MMC1 8 -#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ -#elif defined(CONFIG_TI814X) -#define BOOT_DEVICE_MMC1 9 -#define BOOT_DEVICE_MMC2 8 /* ROM only supports 2nd instance */ -#endif -#define BOOT_DEVICE_SPI 11 -#define BOOT_DEVICE_UART 65 -#define BOOT_DEVICE_USBETH 68 -#define BOOT_DEVICE_CPGMAC 70 -#endif -#define BOOT_DEVICE_MMC2_2 0xFF +#define BOOT_DEVICE_USB 0x45 -#if defined(CONFIG_AM33XX) -#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 -#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 +#elif defined(CONFIG_AM33XX) +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x05 +#define BOOT_DEVICE_NAND_I2C 0x06 +#define BOOT_DEVICE_MMC1 0x08 +#define BOOT_DEVICE_MMC2 0x09 +#define BOOT_DEVICE_SPI 0x15 +#define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USBETH 0x44 +#define BOOT_DEVICE_CPGMAC 0x46 + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 #elif defined(CONFIG_AM43XX) -#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 +#define BOOT_DEVICE_NOR 0x01 +#define BOOT_DEVICE_NAND 0x05 +#define BOOT_DEVICE_MMC1 0x07 +#define BOOT_DEVICE_MMC2 0x08 +#define BOOT_DEVICE_SPI 0x0A +#define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USB 0x45 +#define BOOT_DEVICE_CPGMAC 0x47 + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 #ifdef CONFIG_SPL_USB_SUPPORT -#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB #else -#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 #endif -#elif defined(CONFIG_TI81XX) -#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 -#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 #endif + #endif diff --git a/arch/arm/include/asm/arch-omap3/spl.h b/arch/arm/include/asm/arch-omap3/spl.h index 8350532..a31b4ea 100644 --- a/arch/arm/include/asm/arch-omap3/spl.h +++ b/arch/arm/include/asm/arch-omap3/spl.h @@ -7,14 +7,16 @@ #ifndef _ASM_ARCH_SPL_H_ #define _ASM_ARCH_SPL_H_ -#define BOOT_DEVICE_NONE 0 -#define BOOT_DEVICE_XIP 1 -#define BOOT_DEVICE_NAND 2 -#define BOOT_DEVICE_ONENAND 3 -#define BOOT_DEVICE_MMC2 5 /*emmc*/ -#define BOOT_DEVICE_MMC1 6 -#define BOOT_DEVICE_XIPWAIT 7 -#define BOOT_DEVICE_MMC2_2 0xFF +#define BOOT_DEVICE_NONE 0x00 +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_NAND 0x02 +#define BOOT_DEVICE_ONENAND 0x03 +#define BOOT_DEVICE_MMC2 0x05 +#define BOOT_DEVICE_MMC1 0x06 +#define BOOT_DEVICE_XIPWAIT 0x07 +#define BOOT_DEVICE_MMC2_2 0x08 +#define BOOT_DEVICE_UART 0x10 +#define BOOT_DEVICE_USB 0x11 #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 diff --git a/arch/arm/include/asm/arch-omap4/spl.h b/arch/arm/include/asm/arch-omap4/spl.h index fb842a2..bace92d 100644 --- a/arch/arm/include/asm/arch-omap4/spl.h +++ b/arch/arm/include/asm/arch-omap4/spl.h @@ -7,15 +7,17 @@ #ifndef _ASM_ARCH_SPL_H_ #define _ASM_ARCH_SPL_H_ -#define BOOT_DEVICE_NONE 0 -#define BOOT_DEVICE_XIP 1 -#define BOOT_DEVICE_XIPWAIT 2 -#define BOOT_DEVICE_NAND 3 -#define BOOT_DEVICE_ONENAND 4 -#define BOOT_DEVICE_MMC1 5 -#define BOOT_DEVICE_MMC2 6 -#define BOOT_DEVICE_MMC2_2 0xFF +#define BOOT_DEVICE_NONE 0x00 +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x03 +#define BOOT_DEVICE_ONENAND 0x04 +#define BOOT_DEVICE_MMC1 0x05 +#define BOOT_DEVICE_MMC2 0x06 +#define BOOT_DEVICE_MMC2_2 0x07 +#define BOOT_DEVICE_UART 0x43 +#define BOOT_DEVICE_USB 0x45 #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 -#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2 #endif diff --git a/arch/arm/include/asm/arch-omap5/spl.h b/arch/arm/include/asm/arch-omap5/spl.h index f707998..468ff5a 100644 --- a/arch/arm/include/asm/arch-omap5/spl.h +++ b/arch/arm/include/asm/arch-omap5/spl.h @@ -7,17 +7,20 @@ #ifndef _ASM_ARCH_SPL_H_ #define _ASM_ARCH_SPL_H_ -#define BOOT_DEVICE_NONE 0 -#define BOOT_DEVICE_XIP 1 -#define BOOT_DEVICE_XIPWAIT 2 -#define BOOT_DEVICE_NAND 3 -#define BOOT_DEVICE_ONENAND 4 -#define BOOT_DEVICE_MMC1 5 -#define BOOT_DEVICE_MMC2 6 -#define BOOT_DEVICE_MMC2_2 7 -#define BOOT_DEVICE_SATA 9 -#define BOOT_DEVICE_SPI 10 +#define BOOT_DEVICE_NONE 0x00 +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x03 +#define BOOT_DEVICE_ONENAND 0x04 +#define BOOT_DEVICE_MMC1 0x05 +#define BOOT_DEVICE_MMC2 0x06 +#define BOOT_DEVICE_MMC2_2 0x07 +#define BOOT_DEVICE_SATA 0x09 +#define BOOT_DEVICE_SPI 0x0A +#define BOOT_DEVICE_QSPI_1 0x0A +#define BOOT_DEVICE_QSPI_4 0x0B #define BOOT_DEVICE_UART 0x43 +#define BOOT_DEVICE_USB 0x45 #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2