From patchwork Tue Apr 28 23:25:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ash Charles X-Patchwork-Id: 465807 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0EC5514007F for ; Wed, 29 Apr 2015 09:25:56 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=Nx9/9Aua; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA79D4B7A9; Wed, 29 Apr 2015 01:25:54 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id b1XNn4mYshTK; Wed, 29 Apr 2015 01:25:54 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4077A4B62C; Wed, 29 Apr 2015 01:25:54 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9413B4B62C for ; Wed, 29 Apr 2015 01:25:51 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RzOdal-BpIlp for ; Wed, 29 Apr 2015 01:25:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f41.google.com (mail-pa0-f41.google.com [209.85.220.41]) by theia.denx.de (Postfix) with ESMTPS id 206CD4B62A for ; Wed, 29 Apr 2015 01:25:47 +0200 (CEST) Received: by pabtp1 with SMTP id tp1so9771875pab.2 for ; Tue, 28 Apr 2015 16:25:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id; bh=IwlihAJkVL7BauVHt8CK5lhjlt269SPTdStNuYVH9aY=; b=Nx9/9AuaszW4pIG60QQNjWIsm625NwCJxX/qfzkmq9ap3S+5pUtCWobfmzbky98Vfq ILIW2CPnms+vxorKj87YP8pyauEtO0uw0Q+Kuxnyi1Z+PW3UHE4XFaxts+WXl051OMbY UZ2nkouCqs+FzXYnB7PVIXd27ho9VWGTBbh9RhYSElT1qL1HeG2PZbiZoyyIdTH1jIBz hR6/6TYI3Ow7fpMwOpngC+kgIHuYJNo39GNeUkLLRQIzc2I3iJ6//OrdlP0eR7sOOG8v dJx8Ez+0+BEGCeg+xEg9HvrMq6CaKwdhFeS7wJdA9FSIyPKZK01hUPo8m5HbFh+yOb07 CMtg== X-Received: by 10.66.255.36 with SMTP id an4mr37139993pad.140.1430263546236; Tue, 28 Apr 2015 16:25:46 -0700 (PDT) Received: from gumstux.mystix.com (s206-116-3-180.bc.hsia.telus.net. [206.116.3.180]) by mx.google.com with ESMTPSA id a5sm23481636pdk.58.2015.04.28.16.25.45 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Apr 2015 16:25:45 -0700 (PDT) From: Ash Charles To: u-boot@lists.denx.de Date: Tue, 28 Apr 2015 16:25:44 -0700 Message-Id: <1430263544-28633-1-git-send-email-ashcharles@gmail.com> X-Mailer: git-send-email 2.1.4 Subject: [U-Boot] [PATCH] pepper: Add support for DDR3 variants X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Some variants of the Gumstix Pepper board use DDR3 memory instead of DDR2. This adds a machine variant to support these DDR3-based boards which can be built as 'pepper_ddr3_defconfig' rather than the normal 'pepper_defconfig'. Signed-off-by: Ash Charles --- board/gumstix/pepper/MAINTAINERS | 1 + board/gumstix/pepper/board.c | 95 ++++++++++++++++++++++++++++++---------- configs/pepper_ddr3_defconfig | 4 ++ 3 files changed, 77 insertions(+), 23 deletions(-) create mode 100644 configs/pepper_ddr3_defconfig diff --git a/board/gumstix/pepper/MAINTAINERS b/board/gumstix/pepper/MAINTAINERS index ae860ec..7132095 100644 --- a/board/gumstix/pepper/MAINTAINERS +++ b/board/gumstix/pepper/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/gumstix/pepper/ F: include/configs/pepper.h F: configs/pepper_defconfig +F: configs/pepper_ddr3_defconfig diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c index f644f81..fbbca3b 100644 --- a/board/gumstix/pepper/board.c +++ b/board/gumstix/pepper/board.c @@ -33,13 +33,55 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SPL_BUILD -static const struct ddr_data ddr2_data = { +#define OSC (V_OSCK/1000000) + +#ifdef CONFIG_USE_DDR3 +static const struct ddr_data ddr_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, +}; + +static const struct cmd_control ddr_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + +static struct emif_regs ddr_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, +}; + +const struct dpll_params dpll_ddr = {400, OSC-1, 1, -1, -1, -1, -1}; + +const struct ctrl_ioregs ioregs_ddr = { + .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, +}; + +#else +static const struct ddr_data ddr_data = { .datardsratio0 = MT47H128M16RT25E_RD_DQS, .datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE, .datawrsratio0 = MT47H128M16RT25E_PHY_WR_DATA, }; -static const struct cmd_control ddr2_cmd_ctrl_data = { +static const struct cmd_control ddr_cmd_ctrl_data = { .cmd0csratio = MT47H128M16RT25E_RATIO, .cmd1csratio = MT47H128M16RT25E_RATIO, @@ -47,7 +89,7 @@ static const struct cmd_control ddr2_cmd_ctrl_data = { .cmd2csratio = MT47H128M16RT25E_RATIO, }; -static const struct emif_regs ddr2_emif_reg_data = { +static const struct emif_regs ddr_emif_reg_data = { .sdram_config = MT47H128M16RT25E_EMIF_SDCFG, .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF, .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1, @@ -56,6 +98,33 @@ static const struct emif_regs ddr2_emif_reg_data = { .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, }; +const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; + +const struct ctrl_ioregs ioregs_ddr = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; +#endif /* CONFIG_USE_DDR3 */ + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +void sdram_init(void) +{ +#ifdef CONFIG_USE_DDR3 + config_ddr(400, &ioregs_ddr, &ddr_data, + &ddr_cmd_ctrl_data, &ddr_emif_reg_data, 0); +#else + config_ddr(266, &ioregs_ddr, &ddr_data, + &ddr_cmd_ctrl_data, &ddr_emif_reg_data, 0); +#endif +} + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { @@ -64,14 +133,6 @@ int spl_start_uboot(void) } #endif -#define OSC (V_OSCK/1000000) -const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; - -const struct dpll_params *get_dpll_ddr_params(void) -{ - return &dpll_ddr; -} - void set_uart_mux_conf(void) { enable_uart0_pin_mux(); @@ -82,19 +143,7 @@ void set_mux_conf_regs(void) enable_board_pin_mux(); } -const struct ctrl_ioregs ioregs = { - .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, -}; -void sdram_init(void) -{ - config_ddr(266, &ioregs, &ddr2_data, - &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); -} #endif int board_init(void) diff --git a/configs/pepper_ddr3_defconfig b/configs/pepper_ddr3_defconfig new file mode 100644 index 0000000..8077399 --- /dev/null +++ b/configs/pepper_ddr3_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="USE_DDR3" +CONFIG_ARM=y +CONFIG_TARGET_PEPPER=y