From patchwork Tue Apr 28 15:44:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 465691 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9F4E214007D for ; Wed, 29 Apr 2015 01:45:17 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A088C4BC94; Tue, 28 Apr 2015 17:45:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id unt5gZ4CM6u5; Tue, 28 Apr 2015 17:45:04 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A7C534B9F5; Tue, 28 Apr 2015 17:44:51 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B9B674BC54 for ; Tue, 28 Apr 2015 17:44:46 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RsTaOkI5Spuj for ; Tue, 28 Apr 2015 17:44:46 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f174.google.com (mail-pd0-f174.google.com [209.85.192.174]) by theia.denx.de (Postfix) with ESMTPS id 273AC4B9F6 for ; Tue, 28 Apr 2015 17:44:40 +0200 (CEST) Received: by pdbqa5 with SMTP id qa5so167444127pdb.1 for ; Tue, 28 Apr 2015 08:44:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A/ssozwbw0MzeWZ7jI9vrMdDEpZdEg1LVoS87crAr3g=; b=SX+EsA1NREnGJMqT/LePKpCYYUHBGpX6XHuOlTxjRVngr7CuJY6TJBZvRKDgYtbCRd W1BL19XFxDVxxm1uf8cCKDE7CKhYdbMzz0PCObSE0WEff3Vs9/OXjQU9GgukxmZwAwpb UFlUEwgp4YGFWFWwHuokbS3L1m2p+lJoMTLMmvJu2m12ha9Q9coRGoAWAwN551FzYnaU m/gM06eQQF2fqLWb//VYOrBi258o0yvlz4XFsbYJBYVKvNu4YkqSjLT9cM9DnLtj3u60 uZn38ic7cQZOnK8zmQ2IynM39iDrt5fcsqd1rzRa7T2B78HOOgjA0XfX/5M39fpCA//3 8Z+Q== X-Gm-Message-State: ALoCoQmw32ThNrahtL6nBYoBTScvJKyZUR+DK6liI2bmYdpZrbrLPA9uh7XYNUzrTciAiQAEplCc X-Received: by 10.70.33.33 with SMTP id o1mr33569185pdi.132.1430235878893; Tue, 28 Apr 2015 08:44:38 -0700 (PDT) Received: from tharvey.gw (68-189-91-139.static.snlo.ca.charter.com. [68.189.91.139]) by mx.google.com with ESMTPSA id kr9sm22965709pab.30.2015.04.28.08.44.37 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Apr 2015 08:44:38 -0700 (PDT) From: Tim Harvey To: Stefano Babic Date: Tue, 28 Apr 2015 08:44:24 -0700 Message-Id: <1430235865-17808-4-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430235865-17808-1-git-send-email-tharvey@gateworks.com> References: <1430235865-17808-1-git-send-email-tharvey@gateworks.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 3/4] imx: mx6: add display of temperature grade of processor in cpu_printinfo() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The MX6 has a temperature grade defined by OCOTP_MEM0[7:6]. While the MX6SX also has temperature grades, I see no mention in the reference manual where that information is stored in the OTP. Signed-off-by: Tim Harvey --- arch/arm/cpu/armv7/mx6/soc.c | 32 +++++++++++++++++++++++++++++++ arch/arm/imx-common/cpu.c | 28 ++++++++++++++++++++++----- arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + include/imx_thermal.h | 6 ++++++ 4 files changed, 62 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index dc422a6..8d41c47 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -109,6 +109,38 @@ u32 get_cpu_speed_grade_hz(void) return 792000000; } +#define OCOTP_MEM0_TEMP_SHIFT 6 + +u32 get_cpu_temp_grade(int *minc, int *maxc) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + uint32_t val; + + val = readl(&fuse->mem0); + val >>= OCOTP_MEM0_TEMP_SHIFT; + val &= 0x3; + + if (minc && maxc) { + if (val == TEMP_AUTOMOTIVE) { + *minc = -40; + *maxc = 125; + } else if (val == TEMP_INDUSTRIAL) { + *minc = -40; + *maxc = 105; + } else if (val == TEMP_EXTCOMMERCIAL) { + *minc = -20; + *maxc = 105; + } else { + *minc = 0; + *maxc = 95; + } + } + return val; +} + #ifdef CONFIG_REVISION_TAG u32 __weak get_board_rev(void) { diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index ead7f08..a1045db 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -146,24 +147,41 @@ int print_cpuinfo(void) #if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL) struct udevice *thermal_dev; - int cpu_tmp, ret; + int cpu_tmp, minc, maxc, ret; #endif cpurev = get_cpu_rev(); #if defined(CONFIG_MX6) printf("CPU: Freescale i.MX%s rev%d.%d", - get_imx_type((cpurev & 0xFF000) >> 12), - (cpurev & 0x000F0) >> 4, - (cpurev & 0x0000F) >> 0); + get_imx_type((cpurev & 0xFF000) >> 12), + (cpurev & 0x000F0) >> 4, + (cpurev & 0x0000F) >> 0); if (is_cpu_type(MXC_CPU_MX6SX)) printf(" at %d MHz", mxc_get_clock(MXC_ARM_CLK) / 1000000); else { +#if defined(CONFIG_IMX6_THERMAL) + switch (get_cpu_temp_grade(&minc, &maxc)) { + case TEMP_AUTOMOTIVE: + puts(" automotive"); + break; + case TEMP_INDUSTRIAL: + puts(" industrial"); + break; + case TEMP_EXTCOMMERCIAL: + puts(" extended commercial"); + break; + default: + puts(" commercial"); + break; + } + printf(" (%dC to %dC)", minc, maxc); printf(" %d MHz", get_cpu_speed_grade_hz() / 1000000); if (get_cpu_speed_grade_hz() != mxc_get_clock(MXC_ARM_CLK)) { printf(" (at %d MHz)", mxc_get_clock(MXC_ARM_CLK) / 1000000); } +#endif /* #if defined(CONFIG_IMX6_THERMAL) */ } puts("\n"); #else @@ -172,7 +190,7 @@ int print_cpuinfo(void) (cpurev & 0x000F0) >> 4, (cpurev & 0x0000F) >> 0, mxc_get_clock(MXC_ARM_CLK) / 1000000); -#endif +#endif /* #if defined(CONFIG_MX6) */ #if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL) ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal_dev); diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index a2cd0a9..c583291 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -17,6 +17,7 @@ u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void); +u32 get_cpu_temp_grade(int *minc, int *maxc); /* returns MXC_CPU_ value */ #define cpu_type(rev) (((rev) >> 12)&0xff) diff --git a/include/imx_thermal.h b/include/imx_thermal.h index be13652..8ce333c 100644 --- a/include/imx_thermal.h +++ b/include/imx_thermal.h @@ -8,6 +8,12 @@ #ifndef _IMX_THERMAL_H_ #define _IMX_THERMAL_H_ +/* CPU Temperature Grades */ +#define TEMP_COMMERCIAL 0 +#define TEMP_EXTCOMMERCIAL 1 +#define TEMP_INDUSTRIAL 2 +#define TEMP_AUTOMOTIVE 3 + struct imx_thermal_plat { void *regs; int fuse_bank;