diff mbox

[U-Boot,3/4] include:configs:ls1021atwr: Enable USB IP support

Message ID 1429685383-6505-3-git-send-email-ramneek.mehresh@freescale.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

ramneek mehresh April 22, 2015, 6:49 a.m. UTC
Enable USB IP support for both EHCI and XHCI for
ls1021atwr platform

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
---
 include/configs/ls1021atwr.h | 29 +++++++++++++++++++++++++++++
 include/linux/usb/xhci-fsl.h |  5 +++++
 2 files changed, 34 insertions(+)

Comments

Marek Vasut April 22, 2015, 11:48 a.m. UTC | #1
On Wednesday, April 22, 2015 at 08:49:42 AM, Ramneek Mehresh wrote:
> Enable USB IP support for both EHCI and XHCI for
> ls1021atwr platform
> 
> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> ---
>  include/configs/ls1021atwr.h | 29 +++++++++++++++++++++++++++++
>  include/linux/usb/xhci-fsl.h |  5 +++++
>  2 files changed, 34 insertions(+)
> 
> diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
> index a13876b..0f59b3c 100644
> --- a/include/configs/ls1021atwr.h
> +++ b/include/configs/ls1021atwr.h
> @@ -28,6 +28,35 @@
>  #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
> 
>  /*
> + * USB
> + */
> +/* EHCI Support - disbaled by default */

'disabled'

> +/*#define CONFIG_HAS_FSL_DR_USB*/

Why is this disabled ?

[...]

Best regards,
Marek Vasut
ramneek mehresh April 23, 2015, 6:51 a.m. UTC | #2
> -----Original Message-----
> From: Marek Vasut [mailto:marex@denx.de]
> Sent: Wednesday, April 22, 2015 5:18 PM
> To: Mehresh Ramneek-B31383
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH 3/4] include:configs:ls1021atwr: Enable USB IP support
> 
> On Wednesday, April 22, 2015 at 08:49:42 AM, Ramneek Mehresh wrote:
> > Enable USB IP support for both EHCI and XHCI for ls1021atwr platform
> >
> > Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> > ---
> >  include/configs/ls1021atwr.h | 29 +++++++++++++++++++++++++++++
> > include/linux/usb/xhci-fsl.h |  5 +++++
> >  2 files changed, 34 insertions(+)
> >
> > diff --git a/include/configs/ls1021atwr.h
> > b/include/configs/ls1021atwr.h index a13876b..0f59b3c 100644
> > --- a/include/configs/ls1021atwr.h
> > +++ b/include/configs/ls1021atwr.h
> > @@ -28,6 +28,35 @@
> >  #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
> >
> >  /*
> > + * USB
> > + */
> > +/* EHCI Support - disbaled by default */
> 
> 'disabled'
> 
> > +/*#define CONFIG_HAS_FSL_DR_USB*/
> 
> Why is this disabled ?
> 
EHCI is disabled because this controller is not exposed via any connector
on the board. However, the silicon still has this controller, and anyone can
use this controller by taking signals out on their board.
XHCI can be used on the board via micro-A usb host connector
> [...]
> 
> Best regards,
> Marek Vasut
Marek Vasut April 23, 2015, 11:56 a.m. UTC | #3
On Thursday, April 23, 2015 at 08:51:14 AM, Ramneek Mehresh wrote:
> > -----Original Message-----
> > From: Marek Vasut [mailto:marex@denx.de]
> > Sent: Wednesday, April 22, 2015 5:18 PM
> > To: Mehresh Ramneek-B31383
> > Cc: u-boot@lists.denx.de
> > Subject: Re: [PATCH 3/4] include:configs:ls1021atwr: Enable USB IP
> > support
> > 
> > On Wednesday, April 22, 2015 at 08:49:42 AM, Ramneek Mehresh wrote:
> > > Enable USB IP support for both EHCI and XHCI for ls1021atwr platform
> > > 
> > > Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
> > > ---
> > > 
> > >  include/configs/ls1021atwr.h | 29 +++++++++++++++++++++++++++++
> > > 
> > > include/linux/usb/xhci-fsl.h |  5 +++++
> > > 
> > >  2 files changed, 34 insertions(+)
> > > 
> > > diff --git a/include/configs/ls1021atwr.h
> > > b/include/configs/ls1021atwr.h index a13876b..0f59b3c 100644
> > > --- a/include/configs/ls1021atwr.h
> > > +++ b/include/configs/ls1021atwr.h
> > > @@ -28,6 +28,35 @@
> > > 
> > >  #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
> > >  
> > >  /*
> > > 
> > > + * USB
> > > + */
> > > +/* EHCI Support - disbaled by default */
> > 
> > 'disabled'
> > 
> > > +/*#define CONFIG_HAS_FSL_DR_USB*/
> > 
> > Why is this disabled ?
> 
> EHCI is disabled because this controller is not exposed via any connector
> on the board. However, the silicon still has this controller, and anyone
> can use this controller by taking signals out on their board.
> XHCI can be used on the board via micro-A usb host connector

Oki, please document it a bit better. The thing you just wrote would be exactly
the nice piece of documentation/comment which should be in the code.

Thanks!

Best regards,
Marek Vasut
ramneek mehresh April 23, 2015, 11:59 a.m. UTC | #4
> -----Original Message-----
> From: Marek Vasut [mailto:marex@denx.de]
> Sent: Thursday, April 23, 2015 5:26 PM
> To: Mehresh Ramneek-B31383
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH 3/4] include:configs:ls1021atwr: Enable USB IP support
> 
> On Thursday, April 23, 2015 at 08:51:14 AM, Ramneek Mehresh wrote:
> > > -----Original Message-----
> > > From: Marek Vasut [mailto:marex@denx.de]
> > > Sent: Wednesday, April 22, 2015 5:18 PM
> > > To: Mehresh Ramneek-B31383
> > > Cc: u-boot@lists.denx.de
> > > Subject: Re: [PATCH 3/4] include:configs:ls1021atwr: Enable USB IP
> > > support
> > >
> > > On Wednesday, April 22, 2015 at 08:49:42 AM, Ramneek Mehresh wrote:
> > > > Enable USB IP support for both EHCI and XHCI for ls1021atwr
> > > > platform
> > > >
> > > > Signed-off-by: Ramneek Mehresh
> <ramneek.mehresh@freescale.com>
> > > > ---
> > > >
> > > >  include/configs/ls1021atwr.h | 29
> +++++++++++++++++++++++++++++
> > > >
> > > > include/linux/usb/xhci-fsl.h |  5 +++++
> > > >
> > > >  2 files changed, 34 insertions(+)
> > > >
> > > > diff --git a/include/configs/ls1021atwr.h
> > > > b/include/configs/ls1021atwr.h index a13876b..0f59b3c 100644
> > > > --- a/include/configs/ls1021atwr.h
> > > > +++ b/include/configs/ls1021atwr.h
> > > > @@ -28,6 +28,35 @@
> > > >
> > > >  #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
> > > >
> > > >  /*
> > > >
> > > > + * USB
> > > > + */
> > > > +/* EHCI Support - disbaled by default */
> > >
> > > 'disabled'
> > >
> > > > +/*#define CONFIG_HAS_FSL_DR_USB*/
> > >
> > > Why is this disabled ?
> >
> > EHCI is disabled because this controller is not exposed via any
> > connector on the board. However, the silicon still has this
> > controller, and anyone can use this controller by taking signals out on their
> board.
> > XHCI can be used on the board via micro-A usb host connector
> 
> Oki, please document it a bit better. The thing you just wrote would be
> exactly the nice piece of documentation/comment which should be in the
> code.
> 
Understood, will do
> Thanks!
> 
> Best regards,
> Marek Vasut
diff mbox

Patch

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a13876b..0f59b3c 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -28,6 +28,35 @@ 
 #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
 
 /*
+ * USB
+ */
+/* EHCI Support - disbaled by default */
+/*#define CONFIG_HAS_FSL_DR_USB*/
+
+#ifdef CONFIG_HAS_FSL_DR_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_FSL
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#endif
+
+/*XHCI Support - enabled by default*/
+#define CONFIG_HAS_FSL_XHCI_USB
+
+#ifdef CONFIG_HAS_FSL_XHCI_USB
+#define CONFIG_USB_XHCI_FSL
+#define CONFIG_USB_XHCI_DWC3
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        1
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
+#endif
+
+#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_EXT2
+#endif
+
+/*
  * Generic Timer Definitions
  */
 #define GENERIC_TIMER_CLK		12500000
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 1751c7a..dc82151 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -50,6 +50,11 @@ 
 #define USBOTGSS_IRQ_SET_1_OEVT_EN		BIT(16)
 #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	BIT(17)
 
+#ifdef CONFIG_LS102XA
+#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR
+#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
+#endif
+
 struct fsl_xhci {
 	struct xhci_hccr *hcd;
 	struct dwc3 *dwc3_reg;