From patchwork Thu Feb 12 06:37:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 439095 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0DB2914017A for ; Thu, 12 Feb 2015 17:38:04 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 594B2A7453; Thu, 12 Feb 2015 07:37:57 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8n8U6x9_PwFp; Thu, 12 Feb 2015 07:37:57 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09923A7458; Thu, 12 Feb 2015 07:37:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0C516A744F for ; Thu, 12 Feb 2015 07:37:51 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1CObBSt-PAB9 for ; Thu, 12 Feb 2015 07:37:50 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by theia.denx.de (Postfix) with ESMTPS id 5D765A744B for ; Thu, 12 Feb 2015 07:37:43 +0100 (CET) Received: by pdjg10 with SMTP id g10so9929126pdj.1 for ; Wed, 11 Feb 2015 22:37:42 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=eeewEBRjfQhTz4Ae5M/HrZiFr6pmypsGJP8so1NFeOA=; b=SJEY//ahZkNcdboiKhEXRk+TkChIxJLgLvN4YdZs5oYpn98c9FP/H3D4j2Wg2t+KAf HCVu5gghQoDQQT6HijyZbKyauE+lQZGYeeNC+/2En1EYCIPp7lImpeXRBhgI5+OdaeUz qV4gZuiRe9ZPqGMxkI4zx/F8I4pSg38ggQdZS/txNNbdaIjZxRMvf8O8hxn1GTstOi8V TERLDNb0YL/aFEZ2PO7AEt8J/8DlIQZiisl6nAcXzrJ8W6KbhZcH7QWUb2nGzm8ecjOO 5gf9fh9v6WQ9QpJ6Ppm3mNzyWyYdXqOGpn1Cnoi5sbf9+B3XzydfkKrzcqBFiRaeJi6h Pafw== X-Gm-Message-State: ALoCoQmRitWyhBp/M/SlBzm545sWqSdTThK5nhmKiqM9TrpRNqQDtREgza1VX8Hj47B8gcgsFo+l X-Received: by 10.66.65.138 with SMTP id x10mr4065345pas.74.1423723062520; Wed, 11 Feb 2015 22:37:42 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id o4sm2715921pdn.3.2015.02.11.22.37.39 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Feb 2015 22:37:41 -0800 (PST) From: Nobuhiro Iwamatsu To: u-boot@lists.denx.de, Nobuhiro Iwamatsu Date: Thu, 12 Feb 2015 15:37:20 +0900 Message-Id: <1423723041-31887-3-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1423723041-31887-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> References: <1423723041-31887-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> Cc: Nobuhiro Iwamatsu Subject: [U-Boot] [PATCH 3/4] arm: rmobile: gose: Add support SDHI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Gose board has three SDHI port. This adds GPIO configuration and initialization function of SDHI, and enables MMC command. Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/gose/gose.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++ configs/gose_defconfig | 1 + include/configs/gose.h | 6 +++++ 3 files changed, 74 insertions(+) diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index d72bc29..bace439 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,14 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13) +#define SDHI0_MSTP314 (1 << 14) +#define SDHI1_MSTP312 (1 << 12) +#define SDHI2_MSTP311 (1 << 11) + +#define SD1CKCR 0xE6150078 +#define SD2CKCR 0xE615026C +#define SD_97500KHZ 0x7 + int board_early_init_f(void) { /* TMU0 */ @@ -59,6 +68,12 @@ int board_early_init_f(void) /* ETHER */ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813); + /* SDHI */ + mstp_clrbits_le32(MSTPSR3, SMSTPCR3, + SDHI0_MSTP314 | SDHI1_MSTP312 | SDHI2_MSTP311); + writel(SD_97500KHZ, SD1CKCR); + writel(SD_97500KHZ, SD2CKCR); + return 0; } @@ -126,6 +141,58 @@ int board_eth_init(bd_t *bis) return ret; } +int board_mmc_init(bd_t *bis) +{ + int ret = -ENODEV; + +#ifdef CONFIG_SH_SDHI + gpio_request(GPIO_FN_SD0_DATA0, NULL); + gpio_request(GPIO_FN_SD0_DATA1, NULL); + gpio_request(GPIO_FN_SD0_DATA2, NULL); + gpio_request(GPIO_FN_SD0_DATA3, NULL); + gpio_request(GPIO_FN_SD0_CLK, NULL); + gpio_request(GPIO_FN_SD0_CMD, NULL); + gpio_request(GPIO_FN_SD0_CD, NULL); + gpio_request(GPIO_FN_SD2_DATA0, NULL); + gpio_request(GPIO_FN_SD2_DATA1, NULL); + gpio_request(GPIO_FN_SD2_DATA2, NULL); + gpio_request(GPIO_FN_SD2_DATA3, NULL); + gpio_request(GPIO_FN_SD2_CLK, NULL); + gpio_request(GPIO_FN_SD2_CMD, NULL); + gpio_request(GPIO_FN_SD2_CD, NULL); + + /* SDHI 0 */ + gpio_request(GPIO_GP_7_17, NULL); + gpio_request(GPIO_GP_2_12, NULL); + gpio_direction_output(GPIO_GP_7_17, 1); /* power on */ + gpio_direction_output(GPIO_GP_2_12, 1); /* 1: 3.3V, 0: 1.8V */ + + ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI0_BASE, 0, + SH_SDHI_QUIRK_16BIT_BUF); + if (ret) + return ret; + + /* SDHI 1 */ + gpio_request(GPIO_GP_7_18, NULL); + gpio_request(GPIO_GP_2_13, NULL); + gpio_direction_output(GPIO_GP_7_18, 1); /* power on */ + gpio_direction_output(GPIO_GP_2_13, 1); /* 1: 3.3V, 0: 1.8V */ + + ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI1_BASE, 1, 0); + if (ret) + return ret; + + /* SDHI 2 */ + gpio_request(GPIO_GP_7_19, NULL); + gpio_request(GPIO_GP_2_26, NULL); + gpio_direction_output(GPIO_GP_7_19, 1); /* power on */ + gpio_direction_output(GPIO_GP_2_26, 1); /* 1: 3.3V, 0: 1.8V */ + + ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI2_BASE, 2, 0); +#endif + return ret; +} + int dram_init(void) { gd->ram_size = CONFIG_SYS_SDRAM_SIZE; diff --git a/configs/gose_defconfig b/configs/gose_defconfig index b5b7682..353f854 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -3,3 +3,4 @@ CONFIG_RMOBILE=y CONFIG_TARGET_GOSE=y CONFIG_DM=y CONFIG_DM_SERIAL=y +CONFIG_SH_SDHI=y diff --git a/include/configs/gose.h b/include/configs/gose.h index 808a8b0..0dc28c7 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -98,4 +98,10 @@ /* SCIF0 */ #define CONFIG_SMSTP7_ENA 0x00200000 +/* SDHI */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_SH_SDHI_FREQ 97500000 + #endif /* __GOSE_H */