From patchwork Tue Dec 9 15:29:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 419157 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2FE4814009B for ; Wed, 10 Dec 2014 02:30:44 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C4CE24B676; Tue, 9 Dec 2014 16:30:23 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id v8kYHVPomvMK; Tue, 9 Dec 2014 16:30:23 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D314E4B6B3; Tue, 9 Dec 2014 16:30:18 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EE8054B66A for ; Tue, 9 Dec 2014 16:30:11 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xvsbsKbdaLZe for ; Tue, 9 Dec 2014 16:30:11 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by theia.denx.de (Postfix) with ESMTPS id 6AC394B675 for ; Tue, 9 Dec 2014 16:30:05 +0100 (CET) Received: by mail-pd0-f175.google.com with SMTP id y10so752099pdj.20 for ; Tue, 09 Dec 2014 07:30:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PfiLze7tqOWW2p6szOabBxjVn2htCFJMbVSZ4KTJf8c=; b=TTJvNRO/rbSC50gZy+c9H6LPyOwpissg8POHjUl3xXTkfrcIPXAoStDSRumLHR+86U Edzuc1vTQPvIQlMUosx/7bhfJBQ9VgNn9BXgKGh7O0lvVbwRg97whJxRYvfSP2x9io81 FL5d0E90X3+GZuE5wg8xCIgDt1s249MaGQKe5E+sZufkov/mapoJLnf/3hIngCZHz4Oa M51YgYLGh2d6hxRys43xTeDGAIG91XOpDTqHuVmmMEuiSLXPc0cMq6n3gRlkf76xHpvw tIgbdgyXYxnv+NZO6LYv/VTeNuBEl5OQhoD2RwqgvVFNqPa9LqjwPmFKMsb8IrUypH9w iA9Q== X-Received: by 10.66.157.137 with SMTP id wm9mr6430262pab.17.1418139004096; Tue, 09 Dec 2014 07:30:04 -0800 (PST) Received: from localhost.localdomain ([49.248.54.161]) by mx.google.com with ESMTPSA id hs10sm1815318pdb.33.2014.12.09.07.30.01 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 09 Dec 2014 07:30:03 -0800 (PST) From: Jagannadha Sutradharudu Teki To: u-boot@lists.denx.de Date: Tue, 9 Dec 2014 20:59:40 +0530 Message-Id: <1418138980-2302-5-git-send-email-jagannadh.teki@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1418138980-2302-1-git-send-email-jagannadh.teki@gmail.com> References: <1418138980-2302-1-git-send-email-jagannadh.teki@gmail.com> Subject: [U-Boot] [PATCH 4/4] sf: Enable byte program support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Enabled byte program support for sst flashes in sf. Few controllers will only support BP, so this patch gives a rx transfer flag to set the BP so-that sf will operate on byte program transfer. Signed-off-by: Jagannadha Sutradharudu Teki Tested-by: Bin Meng --- drivers/mtd/spi/sf_internal.h | 5 ++++- drivers/mtd/spi/sf_params.c | 18 +++++++++--------- drivers/mtd/spi/sf_probe.c | 8 ++++++-- include/spi.h | 1 + 4 files changed, 20 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index fb53cb0..785f7a9 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -40,10 +40,13 @@ enum { SECT_4K = 1 << 0, SECT_32K = 1 << 1, E_FSR = 1 << 2, - WR_QPP = 1 << 3, + SST_BP = 1 << 3, SST_WP = 1 << 4, + WR_QPP = 1 << 5, }; +#define SST_WR (SST_BP | SST_WP) + #define SPI_FLASH_3B_ADDR_LEN 3 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN) #define SPI_FLASH_16MB_BOUN 0x1000000 diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 0f1f837..30875b3 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -89,16 +89,16 @@ const struct spi_flash_params spi_flash_params_table[] = { {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WP}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WP}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WP}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WP}, + {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR}, + {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR}, + {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WR}, + {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WR}, {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WP}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WP}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WP}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WP}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WP}, + {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WR}, + {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WR}, + {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WR}, + {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR}, + {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR}, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, RD_NORM, 0}, diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 7cde4c0..ce9987f 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -136,8 +136,12 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, #ifndef CONFIG_DM_SPI_FLASH flash->write = spi_flash_cmd_write_ops; #if defined(CONFIG_SPI_FLASH_SST) - if (params->flags & SST_WP) - flash->write = sst_write_wp; + if (params->flags & SST_WR) { + if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) + flash->write = sst_write_bp; + else + flash->write = sst_write_wp; + } #endif flash->erase = spi_flash_cmd_erase_ops; flash->read = spi_flash_cmd_read_ops; diff --git a/include/spi.h b/include/spi.h index 5b78271..ec17bd0 100644 --- a/include/spi.h +++ b/include/spi.h @@ -34,6 +34,7 @@ /* SPI TX operation modes */ #define SPI_OPM_TX_QPP (1 << 0) +#define SPI_OPM_TX_BP (1 << 1) /* SPI RX operation modes */ #define SPI_OPM_RX_AS (1 << 0)