From patchwork Tue Dec 2 07:52:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 416740 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6E3D814017B for ; Tue, 2 Dec 2014 18:52:57 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C7EE94B816; Tue, 2 Dec 2014 08:52:53 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id r5K7VMa--sK7; Tue, 2 Dec 2014 08:52:53 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1E4AE4B826; Tue, 2 Dec 2014 08:52:53 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 83CB14B826 for ; Tue, 2 Dec 2014 08:52:47 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dMVihfT5Qp5k for ; Tue, 2 Dec 2014 08:52:47 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f172.google.com (mail-pd0-f172.google.com [209.85.192.172]) by theia.denx.de (Postfix) with ESMTPS id 174284B816 for ; Tue, 2 Dec 2014 08:52:42 +0100 (CET) Received: by mail-pd0-f172.google.com with SMTP id y13so12785517pdi.3 for ; Mon, 01 Dec 2014 23:52:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=AAZox2/hiWlLp+f6kwhbmUYY1prQKtw+1VK3+gbGutY=; b=K4EdnffqA4G+PST9QIOMuusFPqjrI4S/wvN1PahGld3ylI+31GbJJZjM1wOvDYhHSF 6sYVLP7W8CcvWGe5FADJ1QoqxIwxLW8PvQLpPLNleNPSS4lB2X5gDpCcz4ZoZZFGnwP3 AW/CFv72vzxe0cIFSqk9EYsoe/0uqW360KT/KcLYi3xGbwPI7WNS1Xi1Bc52L8l5Y9hK VwNneGY8W+qX2jWsquLWlRAQgyMQuDlRzEXoqqIXc0wWQhC/TuYqDjDFbdBpGXaNxSV6 7tDLnJNi+TSnG4T5P3HQCwKS+fgAqFPrZqpG0NEBhWv/Pn/M5P9RAfIsBkowvXwY6rno pgMw== X-Gm-Message-State: ALoCoQlx1VzrIkDBqPhRUItsefR/HhpYIJvqhh23v5P/Q65z0GiaaRmQ+jB4ed4wzxP31kEKzQiY X-Received: by 10.68.69.80 with SMTP id c16mr3173093pbu.125.1417506760611; Mon, 01 Dec 2014 23:52:40 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id w2sm19401256pbs.59.2014.12.01.23.52.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 01 Dec 2014 23:52:39 -0800 (PST) From: Nobuhiro Iwamatsu To: u-boot@lists.denx.de, Nobuhiro Iwamatsu Date: Tue, 2 Dec 2014 16:52:18 +0900 Message-Id: <1417506744-7018-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.3 Cc: Nobuhiro Iwamatsu Subject: [U-Boot] [PATCH v2 1/7] arm: rmobile: rcar: Move module control register to header file of SoC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Module control registers of R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) are same address. This moves these to header file of SoC. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm/include/asm/arch-rmobile/rcar-base.h | 39 +++++++++++++++++++++++++++ board/renesas/alt/alt.c | 11 -------- board/renesas/gose/gose.c | 8 ------ board/renesas/koelsch/koelsch.c | 8 ------ board/renesas/lager/lager.c | 8 ------ 5 files changed, 39 insertions(+), 35 deletions(-) diff --git a/arch/arm/include/asm/arch-rmobile/rcar-base.h b/arch/arm/include/asm/arch-rmobile/rcar-base.h index dbbebcf..23c4bba 100644 --- a/arch/arm/include/asm/arch-rmobile/rcar-base.h +++ b/arch/arm/include/asm/arch-rmobile/rcar-base.h @@ -29,6 +29,45 @@ #define SCIF4_BASE 0xE6EE0000 #define SCIF5_BASE 0xE6EE8000 +/* Module stop status register */ +#define MSTPSR0 0xE6150030 +#define MSTPSR1 0xE6150038 +#define MSTPSR2 0xE6150040 +#define MSTPSR3 0xE6150048 +#define MSTPSR4 0xE615004C +#define MSTPSR5 0xE615003C +#define MSTPSR7 0xE61501C4 +#define MSTPSR8 0xE61509A0 +#define MSTPSR9 0xE61509A4 +#define MSTPSR10 0xE61509A8 +#define MSTPSR11 0xE61509AC + +/* Realtime module stop control register */ +#define RMSTPCR0 0xE6150110 +#define RMSTPCR1 0xE6150114 +#define RMSTPCR2 0xE6150118 +#define RMSTPCR3 0xE615011C +#define RMSTPCR4 0xE6150120 +#define RMSTPCR5 0xE6150124 +#define RMSTPCR7 0xE615012C +#define RMSTPCR8 0xE6150980 +#define RMSTPCR9 0xE6150984 +#define RMSTPCR10 0xE6150988 +#define RMSTPCR11 0xE615098C + +/* System module stop control register */ +#define SMSTPCR0 0xE6150130 +#define SMSTPCR1 0xE6150134 +#define SMSTPCR2 0xE6150138 +#define SMSTPCR3 0xE615013C +#define SMSTPCR4 0xE6150140 +#define SMSTPCR5 0xE6150144 +#define SMSTPCR7 0xE615014C +#define SMSTPCR8 0xE6150990 +#define SMSTPCR9 0xE6150994 +#define SMSTPCR10 0xE6150998 +#define SMSTPCR11 0xE615099C + /* * SH-I2C * Ch2 and ch3 are different address. These are defined diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index 523c5f1..bf90f2e 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -37,20 +37,9 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF2_MSTP719 (1 << 19) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) - -#define MSTPSR3 0xE6150048 -#define SMSTPCR3 0xE615013C #define IIC1_MSTP323 (1 << 23) #define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 715fba0..bb6849e 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -41,16 +41,8 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) #define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 244bc58..14d1770 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -43,16 +43,8 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) #define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 93273b2..23ef194 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -50,16 +50,8 @@ void s_init(void) qos_init(); } -#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) #define mstp_setbits(type, addr, saddr, set) \