From patchwork Fri Oct 31 07:07:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 405207 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 09B2314009A for ; Fri, 31 Oct 2014 18:07:44 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E4CA74BBC1; Fri, 31 Oct 2014 08:07:41 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id okgCHruzzNXR; Fri, 31 Oct 2014 08:07:41 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6E4544BBC8; Fri, 31 Oct 2014 08:07:41 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CC84D4BBC8 for ; Fri, 31 Oct 2014 08:07:33 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UunreH0vxSJa for ; Fri, 31 Oct 2014 08:07:33 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f46.google.com (mail-pa0-f46.google.com [209.85.220.46]) by theia.denx.de (Postfix) with ESMTPS id 0C4C54BBC1 for ; Fri, 31 Oct 2014 08:07:28 +0100 (CET) Received: by mail-pa0-f46.google.com with SMTP id lf10so7092293pab.19 for ; Fri, 31 Oct 2014 00:07:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=JIymVmpQsVA4PnAfZmf/jWyVkDsiK/Bf0DTpTCMQSpo=; b=lpxlWk5zO9v4t4DBzkrXjI/YurlfJRAauzCcxIFNzBWF0+gbheWg3Gxc5965mMCNoe v2xyNzfKPXUD3GUBGHfxROjY9dp5P3HITJR576cH4j+ToOTb4kVI3TKA+xVL5Un/cWJT QPKoIto+6xWHHe+lvw7uJBOKBil5LQwWZqrozrvY4Qs2qqJJ8urFrobBBW8VWLCRyozU z73yq3uxKJC/9VoyEvZUBLiTfyiZjoJL+2/Bdh+d2fUV6y6tVaqeQtSnt7OMRZo2O5gN wP/NJtZ+MGI1n8Z+WfNbWsFjGTIIpJSN52p9FQKa0JRTtiGpvIZA63xn41KennRwjVsb oA5g== X-Gm-Message-State: ALoCoQlwk4sX4/Mq86JU0/q9V1+IT33uh4qtbZilEVetLuYWNI5TpIlunzW5fNwwhryYXupUj3xU X-Received: by 10.70.103.174 with SMTP id fx14mr23228161pdb.23.1414739247128; Fri, 31 Oct 2014 00:07:27 -0700 (PDT) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id f2sm8994346pdo.29.2014.10.31.00.07.24 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 31 Oct 2014 00:07:25 -0700 (PDT) From: Nobuhiro Iwamatsu To: u-boot@lists.denx.de, Nobuhiro Iwamatsu Date: Fri, 31 Oct 2014 16:07:16 +0900 Message-Id: <1414739236-10723-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.1 Cc: Nobuhiro Iwamatsu Subject: [U-Boot] [PATCH] arm: rmobile: r8a7790: Update initialize L2 cache X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Initialization of L2CTLR[5] was set only as R8A7790 by commit 237faf095fb43abbed6e40266ef7efccc8b9308b. However, initialization of cash needs to be performed continuously. This changes into the processing which continues initialization of L2CTLR[5] into L2CTLR cash and performs it. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S index 879e0e0..d47546a 100644 --- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S +++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S @@ -60,17 +60,10 @@ do_lowlevel_init: cmp r1, #3 /* has already been set up */ bicne r0, r0, #0xe7 orrne r0, r0, #0x83 /* L2CTLR[7:6] + L2CTLR[2:0] */ - - ldr r2, =0xFF000044 /* PRR */ - ldr r1, [r2] - and r1, r1, #0x7F00 - lsrs r1, r1, #8 - cmp r1, #0x45 /* 0x45 is ID of r8a7790 */ - bne L2CTLR_5_SKIP +#if defined(CONFIG_R8A7790) orrne r0, r0, #0x20 /* L2CTLR[5] */ -L2CTLR_5_SKIP: +#endif mcrne p15, 1, r0, c9, c0, 2 - _exit_init_l2_a15: ldr r3, =(CONFIG_SYS_INIT_SP_ADDR) sub sp, r3, #4