From patchwork Tue Oct 28 17:14:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 404304 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id CFD8414007B for ; Wed, 29 Oct 2014 04:14:52 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 98E2B4B82F; Tue, 28 Oct 2014 18:14:49 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YhZn9Zo0wvXW; Tue, 28 Oct 2014 18:14:49 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E43FE4B834; Tue, 28 Oct 2014 18:14:48 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A83124B82F for ; Tue, 28 Oct 2014 18:14:45 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zR+3+3PjgE-d for ; Tue, 28 Oct 2014 18:14:45 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gagarine.paulk.fr (gagarine.paulk.fr [109.190.93.129]) by theia.denx.de (Postfix) with ESMTPS id 76C834B82A for ; Tue, 28 Oct 2014 18:14:41 +0100 (CET) Received: by gagarine.paulk.fr (Postfix, from userid 65534) id 286F843C48; Tue, 28 Oct 2014 18:14:41 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on gagarine.paulk.fr X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable version=3.3.2 Received: from armstrong.paulk.fr (armstrong.paulk.fr [82.233.88.171]) by gagarine.paulk.fr (Postfix) with ESMTPS id EEEDE43CFE; Tue, 28 Oct 2014 18:14:33 +0100 (CET) Received: from aldrin.trisquel.info (aldrin [192.168.0.128]) by armstrong.paulk.fr (Postfix) with ESMTP id 41B3B37633; Tue, 28 Oct 2014 18:14:32 +0100 (CET) From: Paul Kocialkowski To: u-boot@lists.denx.de Date: Tue, 28 Oct 2014 18:14:23 +0100 Message-Id: <1414516463-1679-1-git-send-email-contact@paulk.fr> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414505141-16156-1-git-send-email-contact@paulk.fr> References: <1414505141-16156-1-git-send-email-contact@paulk.fr> Cc: Tom Rini Subject: [U-Boot] [PATCH v2] twl4030: VMMC2 3.2V enable on MMC init X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This enables the VMMC2 LDO, which powers the MMC2 device. When the device starts from MMC2, this has already been enabled by the BootROM, but when starting from peripheral boot (USB, UART), it is not the case. Signed-off-by: Paul Kocialkowski Acked-by: Pantelis Antoniou --- drivers/power/twl4030.c | 6 ++++++ include/twl4030.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c index 3e50310..e578ae6 100644 --- a/drivers/power/twl4030.c +++ b/drivers/power/twl4030.c @@ -98,4 +98,10 @@ void twl4030_power_mmc_init(void) TWL4030_PM_RECEIVER_VMMC1_VSEL_32, TWL4030_PM_RECEIVER_VMMC1_DEV_GRP, TWL4030_PM_RECEIVER_DEV_GRP_P1); + + /* Set VMMC2 to 3.15 Volts */ + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED, + TWL4030_PM_RECEIVER_VMMC2_VSEL_32, + TWL4030_PM_RECEIVER_VMMC2_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); } diff --git a/include/twl4030.h b/include/twl4030.h index 093c61d..18795a6 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -395,6 +395,8 @@ #define TWL4030_PM_RECEIVER_VDAC_VSEL_18 0x03 #define TWL4030_PM_RECEIVER_VMMC1_VSEL_30 0x02 #define TWL4030_PM_RECEIVER_VMMC1_VSEL_32 0x03 +#define TWL4030_PM_RECEIVER_VMMC2_VSEL_30 0x0B +#define TWL4030_PM_RECEIVER_VMMC2_VSEL_32 0x0C #define TWL4030_PM_RECEIVER_VSIM_VSEL_18 0x03 /* Device Selection in PM Receiver Module */