From patchwork Thu Sep 25 09:25:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Jiang X-Patchwork-Id: 392854 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B98D8140077 for ; Wed, 24 Sep 2014 20:02:53 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C3043A741E; Wed, 24 Sep 2014 12:02:50 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0a3z-LeS-5g5; Wed, 24 Sep 2014 12:02:50 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BDB2CA73EC; Wed, 24 Sep 2014 12:02:47 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 233C8A7425 for ; Wed, 24 Sep 2014 12:02:05 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dWm4o+FkHCAk for ; Wed, 24 Sep 2014 12:01:59 +0200 (CEST) X-Greylist: delayed 1035 seconds by postgrey-1.27 at theia; Wed, 24 Sep 2014 12:01:49 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2on0072.outbound.protection.outlook.com [65.55.169.72]) by theia.denx.de (Postfix) with ESMTPS id F3560A7407 for ; Wed, 24 Sep 2014 12:01:48 +0200 (CEST) Received: from BN3PR0301CA0003.namprd03.prod.outlook.com (25.160.180.141) by BL2PR03MB1009.namprd03.prod.outlook.com (10.141.182.147) with Microsoft SMTP Server (TLS) id 15.0.1034.13; Wed, 24 Sep 2014 09:28:34 +0000 Received: from BN1AFFO11FD006.protection.gbl (2a01:111:f400:7c10::121) by BN3PR0301CA0003.outlook.office365.com (2a01:111:e400:4000::13) with Microsoft SMTP Server (TLS) id 15.0.1034.13 via Frontend Transport; Wed, 24 Sep 2014 09:28:34 +0000 Received: from nwd2mta2.analog.com (137.71.25.57) by BN1AFFO11FD006.mail.protection.outlook.com (10.58.52.66) with Microsoft SMTP Server (TLS) id 15.0.1029.15 via Frontend Transport; Wed, 24 Sep 2014 09:28:34 +0000 Received: from NWD2HUBCAS8.ad.analog.com (nwd2hubcas8.ad.analog.com [10.64.72.141]) by nwd2mta2.analog.com (8.13.8/8.13.8) with ESMTP id s8OCB9jO019460 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL); Wed, 24 Sep 2014 08:11:10 -0400 Received: from zeus.spd.analog.com (10.64.82.11) by NWD2HUBCAS8.ad.analog.com (10.64.72.141) with Microsoft SMTP Server id 14.3.210.2; Wed, 24 Sep 2014 05:27:58 -0400 Received: from linux.site ([10.99.22.20]) by zeus.spd.analog.com (8.14.6/8.14.6) with ESMTP id s8O9Ru4k019616; Wed, 24 Sep 2014 05:27:57 -0400 Received: from localhost.localdomain (unknown [10.99.24.124]) by linux.site (Postfix) with ESMTP id A82F73AEBBDE; Tue, 23 Sep 2014 19:27:47 -0600 (MDT) From: Scott Jiang To: , Jagannadha Sutradharudu Teki Date: Thu, 25 Sep 2014 17:25:30 +0800 Message-ID: <1411637130-8686-2-git-send-email-scott.jiang.linux@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1411637130-8686-1-git-send-email-scott.jiang.linux@gmail.com> References: <1411637130-8686-1-git-send-email-scott.jiang.linux@gmail.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Matching-Connectors: 130560245146011415; (52f37747-95c3-483a-bd05-08d153b03fac); () X-Forefront-Antispam-Report: CIP:137.71.25.57; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(199003)(189002)(105596002)(73392002)(74662003)(6806004)(83072002)(55446002)(86362001)(80022003)(81342003)(50226001)(92726001)(92566001)(31966008)(81542003)(4396001)(77982003)(73972006)(79102003)(50466002)(19580405001)(21056001)(33646002)(48376002)(19580395003)(62966002)(95666004)(575784001)(81442002)(85306004)(44976005)(90102001)(46102003)(77156001)(229853001)(76176999)(47776003)(87286001)(106466001)(104166001)(61266001)(49486002)(87936001)(85852003)(82202001)(74502003)(64706001)(87572001)(36756003)(107046002)(89996001)(120916001)(50986999)(10300001)(20776003)(102836001)(99396003)(2004002); DIR:OUT; SFP:1101; SCL:1; SRVR:BL2PR03MB1009; H:nwd2mta2.analog.com; FPR:; MLV:sfv; PTR:nwd2mail11.analog.com; A:1; MX:1; LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB1009; X-Forefront-PRVS: 03449D5DD1 Received-SPF: SoftFail (protection.outlook.com: domain of transitioning gmail.com discourages use of 137.71.25.57 as permitted sender) Authentication-Results: spf=softfail (sender IP is 137.71.25.57) smtp.mailfrom=scott.jiang.linux@gmail.com; Cc: adi-u-boot-devel@lists.sourceforge.net Subject: [U-Boot] [PATCH 2/2] spi: add common spi3 controller driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de SPI3 controller is not only used on BF609 platform. So we add a common controller driver and leave machine specific configuration in board drivers. Remove obsolete spi6xx.h and select new board driver in configuration file. Signed-off-by: Scott Jiang --- drivers/spi/Makefile | 1 + drivers/spi/adi_spi3.c | 222 ++++++++++++++++ .../bits/spi6xx.h => drivers/spi/adi_spi3.h | 27 +- drivers/spi/bfin_spi6xx.c | 279 ++------------------ include/configs/bf609-ezkit.h | 1 + 5 files changed, 262 insertions(+), 268 deletions(-) create mode 100644 drivers/spi/adi_spi3.c rename arch/blackfin/include/asm/mach-common/bits/spi6xx.h => drivers/spi/adi_spi3.h (95%) diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index f02c35a..e0c82e6 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_BFIN_SPI) += bfin_spi.o obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o +obj-$(CONFIG_ADI_SPI3) += adi_spi3.o obj-$(CONFIG_CF_SPI) += cf_spi.o obj-$(CONFIG_CF_QSPI) += cf_qspi.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o diff --git a/drivers/spi/adi_spi3.c b/drivers/spi/adi_spi3.c new file mode 100644 index 0000000..89c914a --- /dev/null +++ b/drivers/spi/adi_spi3.c @@ -0,0 +1,222 @@ +/* + * Analog Devices SPI3 controller driver + * + * Copyright (c) 2014 Analog Devices Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include "adi_spi3.h" + +#define to_adi_spi_slave(s) container_of(s, struct adi_spi_slave, slave) + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + if (is_gpio_cs(cs)) + return gpio_is_valid(gpio_cs(cs)); + else + return adi_spi_cs_valid(bus, cs); +} + +void spi_cs_activate(struct spi_slave *slave) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + + if (is_gpio_cs(slave->cs)) { + unsigned int cs = gpio_cs(slave->cs); + gpio_set_value(cs, sdev->cs_pol); + } else { + u32 ssel; + ssel = readl(&sdev->regs->ssel); + ssel |= BIT_SSEL_EN(slave->cs); + if (sdev->cs_pol) + ssel |= BIT_SSEL_VAL(slave->cs); + else + ssel &= ~BIT_SSEL_VAL(slave->cs); + writel(ssel, &sdev->regs->ssel); + } +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + + if (is_gpio_cs(slave->cs)) { + unsigned int cs = gpio_cs(slave->cs); + gpio_set_value(cs, !sdev->cs_pol); + gpio_set_value(cs, 1); + } else { + u32 ssel; + ssel = readl(&sdev->regs->ssel); + if (sdev->cs_pol) + ssel &= ~BIT_SSEL_VAL(slave->cs); + else + ssel |= BIT_SSEL_VAL(slave->cs); + /* deassert cs */ + writel(ssel, &sdev->regs->ssel); + /* disable cs */ + ssel &= ~BIT_SSEL_EN(slave->cs); + writel(ssel, &sdev->regs->ssel); + } +} + +void spi_init() +{ +} + +void spi_set_speed(struct spi_slave *slave, uint hz) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + u32 clock; + + clock = get_spi_clk() / hz; + if (clock) + clock--; + sdev->clock = clock; +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct adi_spi_slave *sdev; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + if (max_hz > get_spi_clk()) + return NULL; + + sdev = adi_spi_setup(bus, cs); + if (!sdev) + return NULL; + + sdev->control = SPI_CTL_EN | SPI_CTL_MSTR; + if (mode & SPI_CPHA) + sdev->control |= SPI_CTL_CPHA; + if (mode & SPI_CPOL) + sdev->control |= SPI_CTL_CPOL; + if (mode & SPI_LSB_FIRST) + sdev->control |= SPI_CTL_LSBF; + sdev->control &= ~SPI_CTL_ASSEL; + sdev->cs_pol = mode & SPI_CS_HIGH ? 1 : 0; + spi_set_speed(&sdev->slave, max_hz); + + return &sdev->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + free(sdev); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + + if (is_gpio_cs(slave->cs)) { + unsigned int cs = gpio_cs(slave->cs); + gpio_request(cs, "adi-spi3"); + gpio_direction_output(cs, !sdev->cs_pol); + sdev->pins[0] = P_DONTCARE; + } + peripheral_request_list(sdev->pins, "adi-spi3"); + + writel(sdev->control, &sdev->regs->control); + writel(sdev->clock, &sdev->regs->clock); + writel(0x0, &sdev->regs->delay); + writel(SPI_RXCTL_REN, &sdev->regs->rx_control); + writel(SPI_TXCTL_TEN | SPI_TXCTL_TTI, &sdev->regs->tx_control); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + + peripheral_free_list(sdev->pins); + if (is_gpio_cs(slave->cs)) + gpio_free(gpio_cs(slave->cs)); + + writel(0x0, &sdev->regs->rx_control); + writel(0x0, &sdev->regs->tx_control); + writel(0x0, &sdev->regs->control); +} + +#ifndef CONFIG_SPI_IDLE_VAL +# define CONFIG_SPI_IDLE_VAL 0xff +#endif + +static int spi_pio_xfer(struct adi_spi_slave *sdev, const u8 *tx, u8 *rx, + uint bytes) +{ + /* discard invalid rx data and empty rfifo */ + while (!(readl(&sdev->regs->status) & SPI_STAT_RFE)) + readl(&sdev->regs->rfifo); + + while (bytes--) { + u8 value = (tx ? *tx++ : CONFIG_SPI_IDLE_VAL); + debug("%s: tx:%x ", __func__, value); + writel(value, &sdev->regs->tfifo); + while (readl(&sdev->regs->status) & SPI_STAT_RFE) + if (ctrlc()) + return -1; + value = readl(&sdev->regs->rfifo); + if (rx) + *rx++ = value; + debug("rx:%x\n", value); + } + + return 0; +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + struct adi_spi_slave *sdev = to_adi_spi_slave(slave); + const u8 *tx = dout; + u8 *rx = din; + uint bytes = bitlen / 8; + int ret = 0; + + debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, + slave->bus, slave->cs, bitlen, bytes, flags); + + if (bitlen == 0) + goto done; + + /* we can only do 8 bit transfers */ + if (bitlen % 8) { + flags |= SPI_XFER_END; + goto done; + } + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + ret = spi_pio_xfer(sdev, tx, rx, bytes); + + done: + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return ret; +} diff --git a/arch/blackfin/include/asm/mach-common/bits/spi6xx.h b/drivers/spi/adi_spi3.h similarity index 95% rename from arch/blackfin/include/asm/mach-common/bits/spi6xx.h rename to drivers/spi/adi_spi3.h index 3368712..e0e1fa8 100644 --- a/arch/blackfin/include/asm/mach-common/bits/spi6xx.h +++ b/drivers/spi/adi_spi3.h @@ -1,7 +1,7 @@ /* - * Analog Devices bfin_spi3 controller driver + * Analog Devices SPI3 controller driver * - * Copyright (c) 2011 Analog Devices Inc. + * Copyright (c) 2014 Analog Devices Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -11,10 +11,6 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef _SPI_CHANNEL_H_ @@ -22,6 +18,10 @@ #include +#define MAX_CTRL_CS 7 +#define gpio_cs(cs) ((cs) - MAX_CTRL_CS) +#define is_gpio_cs(cs) ((cs) > MAX_CTRL_CS) + /* SPI_CONTROL */ #define SPI_CTL_EN 0x00000001 /* Enable */ #define SPI_CTL_MSTR 0x00000002 /* Master/Slave */ @@ -208,10 +208,12 @@ #define SPI_ILAT_CLR_RFI 0x00000400 /*Receive Finish Indication */ #define SPI_ILAT_CLR_TFI 0x00000800 /*Transmit Finish Indication */ +#define BIT_SSEL_VAL(x) ((1 << 8) << x) /* Slave Select input value bit */ +#define BIT_SSEL_EN(x) (1 << x) /* Slave Select enable bit*/ /* * bfin spi3 registers layout */ -struct bfin_spi_regs { +struct spi_regs { u32 revid; u32 control; u32 rx_control; @@ -237,4 +239,15 @@ struct bfin_spi_regs { u32 tfifo; }; +struct adi_spi_slave { + struct spi_slave slave; + u32 control, clock; + struct spi_regs *regs; + unsigned short *pins; + int cs_pol; +}; + +extern int adi_spi_cs_valid(unsigned int bus, unsigned int cs); +extern struct adi_spi_slave *adi_spi_setup(unsigned int bus, unsigned int cs); + #endif /* _SPI_CHANNEL_H_ */ diff --git a/drivers/spi/bfin_spi6xx.c b/drivers/spi/bfin_spi6xx.c index eba01d1..39573d1 100644 --- a/drivers/spi/bfin_spi6xx.c +++ b/drivers/spi/bfin_spi6xx.c @@ -1,7 +1,7 @@ /* - * Analog Devices SPI3 controller driver + * Analog Devices bf609 spi driver * - * Copyright (c) 2011 Analog Devices Inc. + * Copyright (c) 2014 Analog Devices Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -11,108 +11,19 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include -#include #include - -#include -#include -#include #include -#include - -struct bfin_spi_slave { - struct spi_slave slave; - u32 control, clock; - struct bfin_spi_regs *regs; - int cs_pol; -}; - -#define to_bfin_spi_slave(s) container_of(s, struct bfin_spi_slave, slave) - -#define gpio_cs(cs) ((cs) - MAX_CTRL_CS) -#ifdef CONFIG_BFIN_SPI_GPIO_CS -# define is_gpio_cs(cs) ((cs) > MAX_CTRL_CS) -#else -# define is_gpio_cs(cs) 0 -#endif - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (is_gpio_cs(cs)) - return gpio_is_valid(gpio_cs(cs)); - else - return (cs >= 1 && cs <= MAX_CTRL_CS); -} -void spi_cs_activate(struct spi_slave *slave) -{ - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - - if (is_gpio_cs(slave->cs)) { - unsigned int cs = gpio_cs(slave->cs); - gpio_set_value(cs, bss->cs_pol); - } else { - u32 ssel; - ssel = bfin_read32(&bss->regs->ssel); - ssel |= 1 << slave->cs; - if (bss->cs_pol) - ssel |= (1 << 8) << slave->cs; - else - ssel &= ~((1 << 8) << slave->cs); - bfin_write32(&bss->regs->ssel, ssel); - } - - SSYNC(); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - - if (is_gpio_cs(slave->cs)) { - unsigned int cs = gpio_cs(slave->cs); - gpio_set_value(cs, !bss->cs_pol); - } else { - u32 ssel; - ssel = bfin_read32(&bss->regs->ssel); - if (bss->cs_pol) - ssel &= ~((1 << 8) << slave->cs); - else - ssel |= (1 << 8) << slave->cs; - /* deassert cs */ - bfin_write32(&bss->regs->ssel, ssel); - SSYNC(); - /* disable cs */ - ssel &= ~(1 << slave->cs); - bfin_write32(&bss->regs->ssel, ssel); - } - - SSYNC(); -} - -void spi_init() -{ -} +#include "adi_spi3.h" #define SPI_PINS(n) \ { 0, P_SPI##n##_SCK, P_SPI##n##_MISO, P_SPI##n##_MOSI, 0 } static unsigned short pins[][5] = { -#ifdef SPI0_REGBASE [0] = SPI_PINS(0), -#endif -#ifdef SPI1_REGBASE [1] = SPI_PINS(1), -#endif -#ifdef SPI2_REGBASE - [2] = SPI_PINS(2), -#endif }; #define SPI_CS_PINS(n) \ @@ -122,183 +33,29 @@ static unsigned short pins[][5] = { P_SPI##n##_SSEL7, \ } static const unsigned short cs_pins[][7] = { -#ifdef SPI0_REGBASE [0] = SPI_CS_PINS(0), -#endif -#ifdef SPI1_REGBASE [1] = SPI_CS_PINS(1), -#endif -#ifdef SPI2_REGBASE - [2] = SPI_CS_PINS(2), -#endif }; -void spi_set_speed(struct spi_slave *slave, uint hz) +int adi_spi_cs_valid(unsigned int bus, unsigned int cs) { - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - ulong clk; - u32 clock; - - clk = get_spi_clk(); - clock = clk / hz; - if (clock) - clock--; - bss->clock = clock; + if (bus > 1) + return 0; + return cs >= 1 && cs <= MAX_CTRL_CS; } -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) +struct adi_spi_slave *adi_spi_setup(unsigned int bus, unsigned int cs) { - struct bfin_spi_slave *bss; - u32 reg_base; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - switch (bus) { -#ifdef SPI0_REGBASE - case 0: - reg_base = SPI0_REGBASE; - break; -#endif -#ifdef SPI1_REGBASE - case 1: - reg_base = SPI1_REGBASE; - break; -#endif -#ifdef SPI2_REGBASE - case 2: - reg_base = SPI2_REGBASE; - break; -#endif - default: - debug("%s: invalid bus %u\n", __func__, bus); - return NULL; - } - - bss = spi_alloc_slave(struct bfin_spi_slave, bus, cs); - if (!bss) - return NULL; - - bss->regs = (struct bfin_spi_regs *)reg_base; - bss->control = SPI_CTL_EN | SPI_CTL_MSTR; - if (mode & SPI_CPHA) - bss->control |= SPI_CTL_CPHA; - if (mode & SPI_CPOL) - bss->control |= SPI_CTL_CPOL; - if (mode & SPI_LSB_FIRST) - bss->control |= SPI_CTL_LSBF; - bss->control &= ~SPI_CTL_ASSEL; - bss->cs_pol = mode & SPI_CS_HIGH ? 1 : 0; - spi_set_speed(&bss->slave, max_hz); - - return &bss->slave; -} + struct adi_spi_slave *sdev; -void spi_free_slave(struct spi_slave *slave) -{ - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - free(bss); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - - debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); - - if (is_gpio_cs(slave->cs)) { - unsigned int cs = gpio_cs(slave->cs); - gpio_request(cs, "bfin-spi"); - gpio_direction_output(cs, !bss->cs_pol); - pins[slave->bus][0] = P_DONTCARE; - } else - pins[slave->bus][0] = cs_pins[slave->bus][slave->cs - 1]; - peripheral_request_list(pins[slave->bus], "bfin-spi"); - - bfin_write32(&bss->regs->control, bss->control); - bfin_write32(&bss->regs->clock, bss->clock); - bfin_write32(&bss->regs->delay, 0x0); - bfin_write32(&bss->regs->rx_control, SPI_RXCTL_REN); - bfin_write32(&bss->regs->tx_control, SPI_TXCTL_TEN | SPI_TXCTL_TTI); - SSYNC(); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - - debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); - - peripheral_free_list(pins[slave->bus]); - if (is_gpio_cs(slave->cs)) - gpio_free(gpio_cs(slave->cs)); - - bfin_write32(&bss->regs->rx_control, 0x0); - bfin_write32(&bss->regs->tx_control, 0x0); - bfin_write32(&bss->regs->control, 0x0); - SSYNC(); -} - -#ifndef CONFIG_BFIN_SPI_IDLE_VAL -# define CONFIG_BFIN_SPI_IDLE_VAL 0xff -#endif - -static int spi_pio_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx, - uint bytes) -{ - /* discard invalid rx data and empty rfifo */ - while (!(bfin_read32(&bss->regs->status) & SPI_STAT_RFE)) - bfin_read32(&bss->regs->rfifo); - - while (bytes--) { - u8 value = (tx ? *tx++ : CONFIG_BFIN_SPI_IDLE_VAL); - debug("%s: tx:%x ", __func__, value); - bfin_write32(&bss->regs->tfifo, value); - SSYNC(); - while (bfin_read32(&bss->regs->status) & SPI_STAT_RFE) - if (ctrlc()) - return -1; - value = bfin_read32(&bss->regs->rfifo); - if (rx) - *rx++ = value; - debug("rx:%x\n", value); - } - - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct bfin_spi_slave *bss = to_bfin_spi_slave(slave); - const u8 *tx = dout; - u8 *rx = din; - uint bytes = bitlen / 8; - int ret = 0; - - debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, - slave->bus, slave->cs, bitlen, bytes, flags); - - if (bitlen == 0) - goto done; - - /* we can only do 8 bit transfers */ - if (bitlen % 8) { - flags |= SPI_XFER_END; - goto done; + sdev = spi_alloc_slave(struct adi_spi_slave, bus, cs); + if (sdev) { + if (bus) + sdev->regs = (struct spi_regs *)SPI1_REGBASE; + else + sdev->regs = (struct spi_regs *)SPI0_REGBASE; + pins[bus][0] = cs_pins[bus][cs - 1]; + sdev->pins = pins[bus]; } - - if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); - - ret = spi_pio_xfer(bss, tx, rx, bytes); - - done: - if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); - - return ret; + return sdev; } diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h index 12192ff..839ebe7 100644 --- a/include/configs/bf609-ezkit.h +++ b/include/configs/bf609-ezkit.h @@ -101,6 +101,7 @@ /* * SPI Settings */ +#define CONFIG_ADI_SPI3 #define CONFIG_BFIN_SPI6XX #define CONFIG_ENV_SPI_MAX_HZ 25000000 #define CONFIG_SF_DEFAULT_SPEED 25000000