From patchwork Mon Jun 2 23:13:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 355105 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C055614009C for ; Tue, 3 Jun 2014 09:14:16 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7BE2C4B826; Tue, 3 Jun 2014 01:14:13 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3I79D2y9ysy6; Tue, 3 Jun 2014 01:14:13 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 905FB4B834; Tue, 3 Jun 2014 01:13:54 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 646674A050 for ; Tue, 3 Jun 2014 01:13:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id onSkyiV+Qgu7 for ; Tue, 3 Jun 2014 01:13:47 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f178.google.com (mail-pd0-f178.google.com [209.85.192.178]) by theia.denx.de (Postfix) with ESMTPS id 6A9C04B78E for ; Tue, 3 Jun 2014 01:13:42 +0200 (CEST) Received: by mail-pd0-f178.google.com with SMTP id v10so3932180pde.9 for ; Mon, 02 Jun 2014 16:13:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sAOVEZaN5ln4TmYihz0gYwJt4ODN03H4u65ayCfG3rI=; b=m5q5zCkxdokFtnVk27gHREwF1R31nW31yZqQ85Xp3R7JKtPl6+fNdYSUIwUHCATOYd RV1JjUHGiWG+euD30Ql3yZNXIbJqW51J+JHJjDcixS/YY3wxOIzzIwbUC0xSjjkNrCyh 6BA8N2YOPpbD/wGleO6T6bVa9JXi4+ksmtUY3B7GcVzz3ZzlsRR4pfxHi+8JN/huc1/T 2oKAA3AF3KWQVBrSO7ctInjkEYhW/Y+yteS3UVuwAi1596iK9CC9WFdpCxMcV69FugnL RwCbib8UYO6yhxQw8fCJbEukwjvJyWuiJqunezYoGr+PMdbhREbBpYFVT8xjVBOBK4gO GwIg== X-Gm-Message-State: ALoCoQntrCi4CTGo8ZO7tsUokeSj2y1LYtZUSTZeWTA5k222GQPfRNTvCce8dT07SiDAajOMP1wK X-Received: by 10.68.129.99 with SMTP id nv3mr43634650pbb.128.1401750820860; Mon, 02 Jun 2014 16:13:40 -0700 (PDT) Received: from tharvey-gw.gw (68-189-91-139.static.snlo.ca.charter.com. [68.189.91.139]) by mx.google.com with ESMTPSA id fd5sm12699849pad.12.2014.06.02.16.13.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 02 Jun 2014 16:13:39 -0700 (PDT) From: Tim Harvey To: Stefano Babic Date: Mon, 2 Jun 2014 16:13:19 -0700 Message-Id: <1401750807-5975-3-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1401750807-5975-1-git-send-email-tharvey@gateworks.com> References: <1401750807-5975-1-git-send-email-tharvey@gateworks.com> Cc: Otavio Salvador , u-boot@lists.denx.de, Tom Rini , Stefan Roese Subject: [U-Boot] [PATCH v4 02/10] mx6: add common SPL configuration X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese Cc: Otavio Salvador Cc: Andy Ng Cc: Eric Nelson Cc: Tapani Utriainen Cc: Tom Rini Signed-off-by: Tim Harvey Acked-by: Stefano Babic Acked-by: Nikita Kiryanov --- v4: - no changes v3: - fixed typo s/IMX6SLD/IMX6SDL - add acks from Stefano and Nikita v2: - adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE to accomodate the IMX6SOLO/DUALLITE which have half the iRAM of the IMX6DUAL/IMX6QUAD --- include/configs/imx6_spl.h | 71 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 include/configs/imx6_spl.h diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h new file mode 100644 index 0000000..6fdc438 --- /dev/null +++ b/include/configs/imx6_spl.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2014 Gateworks Corporation + * Author: Tim Harvey + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __IMX6_SPL_CONFIG_H +#define __IMX6_SPL_CONFIG_H + +#ifdef CONFIG_SPL + +#define CONFIG_SPL_FRAMEWORK + +/* + * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals: + * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF + * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well + * - BOOT ROM stack is at 0x0091FFB8 + * - if icache/dcache is enabled (eFuse/strapping controlled) then the + * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to + * fit between 0x00907000 and 0x00918000. + * - Additionally the BOOT ROM loads what they consider the firmware image + * which consists of a 4K header in front of us that contains the IVT, DCD + * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 + * or 64KB + */ +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_TEXT_BASE 0x00908000 +#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* NAND support */ +#if defined(CONFIG_SPL_NAND_SUPPORT) +#define CONFIG_SPL_NAND_MXS +#define CONFIG_SPL_DMA_SUPPORT +#endif + +/* MMC support */ +#if defined(CONFIG_SPL_MMC_SUPPORT) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* offset 69KB */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024) +#endif + +/* SATA support */ +#if defined(CONFIG_SPL_SATA_SUPPORT) +#define CONFIG_SPL_SATA_BOOT_DEVICE 0 +#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 +#endif + +/* Define the payload for FAT/EXT support */ +#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_LIBDISK_SUPPORT +#endif + +#define CONFIG_SPL_BSS_START_ADDR 0x18200000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x18300000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3200000 /* 50 MB */ +#define CONFIG_SYS_TEXT_BASE 0x17800000 +#endif + +#endif