| Message ID | 1396504871-1454-5-git-send-email-tharvey@gateworks.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Stefano Babic |
| Headers | show |
Hi Tim, On 04/03/2014 09:01 AM, Tim Harvey wrote:> Add a common header which can hopefully be shared among imx6 SPL users > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > --- > include/configs/imx6_spl.h | 64 ++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > create mode 100644 include/configs/imx6_spl.h > > diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h > new file mode 100644 > index 0000000..f9bdf55 > --- /dev/null > +++ b/include/configs/imx6_spl.h > @@ -0,0 +1,64 @@ > +/* > + * Author: Tim Harvey <tharvey@gateworks.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > +#ifndef __IMX6_SPL_CONFIG_H > +#define __IMX6_SPL_CONFIG_H > + > +#ifdef CONFIG_SPL > + > +#define CONFIG_SPL_FRAMEWORK > + > +/* > + * IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF That's not true for all IMX6 SoCs. On i.MX6 Solo and DualLite it's 0x00907000 to 0x0091FFFF. > + * - we start at 0x00908000 so as to leave some room for IVT/DCD > + * - recommended stack (from IMX6DQRM Figure 8-3) is at 0x0093FFB8 > + * - this leaves about 224K for SPL image and stack > + */ > +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/mx6/u-boot-spl.lds" > +#define CONFIG_SPL_TEXT_BASE 0x00908000 > +#define CONFIG_SPL_MAX_SIZE (128 * 1024) This should be a smaller value if we want this config to apply for i.MX6 Solo and DualLite, which have a 68KB OCRAM free area. > +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" > +#define CONFIG_SPL_STACK 0x0093FFB8 For i.MX6 Solo and DualLite this address should be lower (recommended address is 0x0091FFB8). > +#define CONFIG_SPL_LIBCOMMON_SUPPORT > +#define CONFIG_SPL_LIBGENERIC_SUPPORT > +#define CONFIG_SPL_SERIAL_SUPPORT > +#define CONFIG_SPL_I2C_SUPPORT > +#define CONFIG_SPL_GPIO_SUPPORT > + > +/* NAND support */ > +#if defined(CONFIG_SPL_NAND_SUPPORT) > +#define CONFIG_SPL_NAND_MXS > +#define CONFIG_SPL_NAND_BASE > +#define CONFIG_SPL_DMA_SUPPORT > +#endif
On Wed, Apr 9, 2014 at 7:55 AM, Nikita Kiryanov <nikita@compulab.co.il> wrote: > Hi Tim, > > On 04/03/2014 09:01 AM, Tim Harvey wrote:> Add a common header which can > hopefully be shared among imx6 SPL users > >> >> Signed-off-by: Tim Harvey <tharvey@gateworks.com> >> --- >> include/configs/imx6_spl.h | 64 > > ++++++++++++++++++++++++++++++++++++++++++++++ >> >> 1 file changed, 64 insertions(+) >> create mode 100644 include/configs/imx6_spl.h >> >> diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h >> new file mode 100644 >> index 0000000..f9bdf55 >> --- /dev/null >> +++ b/include/configs/imx6_spl.h >> @@ -0,0 +1,64 @@ >> +/* >> + * Author: Tim Harvey <tharvey@gateworks.com> >> + * >> + * SPDX-License-Identifier: GPL-2.0+ >> + */ >> +#ifndef __IMX6_SPL_CONFIG_H >> +#define __IMX6_SPL_CONFIG_H >> + >> +#ifdef CONFIG_SPL >> + >> +#define CONFIG_SPL_FRAMEWORK >> + >> +/* >> + * IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF > > > That's not true for all IMX6 SoCs. On i.MX6 Solo and DualLite it's > 0x00907000 to 0x0091FFFF. > > >> + * - we start at 0x00908000 so as to leave some room for IVT/DCD >> + * - recommended stack (from IMX6DQRM Figure 8-3) is at 0x0093FFB8 >> + * - this leaves about 224K for SPL image and stack >> + */ >> +#define CONFIG_SPL_LDSCRIPT >> "arch/arm/cpu/armv7/mx6/u-boot-spl.lds" >> +#define CONFIG_SPL_TEXT_BASE 0x00908000 >> +#define CONFIG_SPL_MAX_SIZE (128 * 1024) > > > This should be a smaller value if we want this config to apply for > i.MX6 Solo and DualLite, which have a 68KB OCRAM free area. Hi Nikita, Agreed - I just discovered this yesterday. I had tested on an IMX6DL/SOLO via boot from OTG, but I had not tested those combinations when booting from flash and indeed they failed. The 68KB OCRAM free area also assumes that you start at 0x00907000 and as we start at 0x00908000 to leave room for the IVT+DCD this becomes 65KB > > >> +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" >> +#define CONFIG_SPL_STACK 0x0093FFB8 > > > For i.MX6 Solo and DualLite this address should be lower (recommended > address is 0x0091FFB8). Agreed > > >> +#define CONFIG_SPL_LIBCOMMON_SUPPORT >> +#define CONFIG_SPL_LIBGENERIC_SUPPORT >> +#define CONFIG_SPL_SERIAL_SUPPORT >> +#define CONFIG_SPL_I2C_SUPPORT >> +#define CONFIG_SPL_GPIO_SUPPORT >> + >> +/* NAND support */ >> +#if defined(CONFIG_SPL_NAND_SUPPORT) >> +#define CONFIG_SPL_NAND_MXS >> +#define CONFIG_SPL_NAND_BASE >> +#define CONFIG_SPL_DMA_SUPPORT >> +#endif > > > > -- > Regards, > Nikita. This presents another challenge for SPL NAND as currently my SPL is ~70K. There is a lot of unnecessary code in the mtd nand layer that I'm including because that layer includes support for both read and write (I don't need write for SPL) as well as various NAND types (and I only need BCH). I'm not sure yet what the best approach is to resolve that. I can either: a) add a lot of ifdef's around functions in drivers/mtd/nand/{nand_base.c,nand_bbt.c} to remove NAND write and non BCH support for CONFIG_SPL_BUILD b) re-write the necessary functionality (code duplication) into drivers/mtd/nand/mxs_nand_spl.c Thanks for the review! Tim
On 04/09/2014 06:32 PM, Tim Harvey wrote: > On Wed, Apr 9, 2014 at 7:55 AM, Nikita Kiryanov <nikita@compulab.co.il> wrote: >> Hi Tim, >> >> On 04/03/2014 09:01 AM, Tim Harvey wrote:> Add a common header which can >> hopefully be shared among imx6 SPL users >> >>> >>> Signed-off-by: Tim Harvey <tharvey@gateworks.com> >>> --- >>> include/configs/imx6_spl.h | 64 >> >> ++++++++++++++++++++++++++++++++++++++++++++++ >>> >>> 1 file changed, 64 insertions(+) >>> create mode 100644 include/configs/imx6_spl.h >>> >>> diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h >>> new file mode 100644 >>> index 0000000..f9bdf55 >>> --- /dev/null >>> +++ b/include/configs/imx6_spl.h >>> @@ -0,0 +1,64 @@ >>> +/* >>> + * Author: Tim Harvey <tharvey@gateworks.com> >>> + * >>> + * SPDX-License-Identifier: GPL-2.0+ >>> + */ >>> +#ifndef __IMX6_SPL_CONFIG_H >>> +#define __IMX6_SPL_CONFIG_H >>> + >>> +#ifdef CONFIG_SPL >>> + >>> +#define CONFIG_SPL_FRAMEWORK >>> + >>> +/* >>> + * IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF >> >> >> That's not true for all IMX6 SoCs. On i.MX6 Solo and DualLite it's >> 0x00907000 to 0x0091FFFF. >> >> >>> + * - we start at 0x00908000 so as to leave some room for IVT/DCD >>> + * - recommended stack (from IMX6DQRM Figure 8-3) is at 0x0093FFB8 >>> + * - this leaves about 224K for SPL image and stack >>> + */ >>> +#define CONFIG_SPL_LDSCRIPT >>> "arch/arm/cpu/armv7/mx6/u-boot-spl.lds" >>> +#define CONFIG_SPL_TEXT_BASE 0x00908000 >>> +#define CONFIG_SPL_MAX_SIZE (128 * 1024) >> >> >> This should be a smaller value if we want this config to apply for >> i.MX6 Solo and DualLite, which have a 68KB OCRAM free area. > > Hi Nikita, > > Agreed - I just discovered this yesterday. I had tested on an > IMX6DL/SOLO via boot from OTG, but I had not tested those combinations > when booting from flash and indeed they failed. > > The 68KB OCRAM free area also assumes that you start at 0x00907000 and > as we start at 0x00908000 to leave room for the IVT+DCD this becomes > 65KB > >> >> >>> +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" >>> +#define CONFIG_SPL_STACK 0x0093FFB8 >> >> >> For i.MX6 Solo and DualLite this address should be lower (recommended >> address is 0x0091FFB8). > > Agreed > >> >> >>> +#define CONFIG_SPL_LIBCOMMON_SUPPORT >>> +#define CONFIG_SPL_LIBGENERIC_SUPPORT >>> +#define CONFIG_SPL_SERIAL_SUPPORT >>> +#define CONFIG_SPL_I2C_SUPPORT >>> +#define CONFIG_SPL_GPIO_SUPPORT >>> + >>> +/* NAND support */ >>> +#if defined(CONFIG_SPL_NAND_SUPPORT) >>> +#define CONFIG_SPL_NAND_MXS >>> +#define CONFIG_SPL_NAND_BASE >>> +#define CONFIG_SPL_DMA_SUPPORT >>> +#endif >> >> >> >> -- >> Regards, >> Nikita. > > This presents another challenge for SPL NAND as currently my SPL is > ~70K. There is a lot of unnecessary code in the mtd nand layer that > I'm including because that layer includes support for both read and > write (I don't need write for SPL) as well as various NAND types (and > I only need BCH). > > I'm not sure yet what the best approach is to resolve that. I can either: > a) add a lot of ifdef's around functions in > drivers/mtd/nand/{nand_base.c,nand_bbt.c} to remove NAND write and non > BCH support for CONFIG_SPL_BUILD > b) re-write the necessary functionality (code duplication) into > drivers/mtd/nand/mxs_nand_spl.c > > Thanks for the review! You're welcome. Let's see if the NAND maintainer can offer some suggestions. Cc-ing Scott Wood > > Tim >
On Thu, 2014-04-10 at 17:37 +0300, Nikita Kiryanov wrote: > On 04/09/2014 06:32 PM, Tim Harvey wrote: > > This presents another challenge for SPL NAND as currently my SPL is > > ~70K. There is a lot of unnecessary code in the mtd nand layer that > > I'm including because that layer includes support for both read and > > write (I don't need write for SPL) as well as various NAND types (and > > I only need BCH). > > > > I'm not sure yet what the best approach is to resolve that. I can either: > > a) add a lot of ifdef's around functions in > > drivers/mtd/nand/{nand_base.c,nand_bbt.c} to remove NAND write and non > > BCH support for CONFIG_SPL_BUILD > > b) re-write the necessary functionality (code duplication) into > > drivers/mtd/nand/mxs_nand_spl.c > > > > Thanks for the review! > > You're welcome. Let's see if the NAND maintainer can offer some > suggestions. > > Cc-ing Scott Wood While I certainly wouldn't mind someone putting in the effort to slim down the main NAND code, so far we've followed option b when we need a tiny NAND SPL. -Scott
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h new file mode 100644 index 0000000..f9bdf55 --- /dev/null +++ b/include/configs/imx6_spl.h @@ -0,0 +1,64 @@ +/* + * Author: Tim Harvey <tharvey@gateworks.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __IMX6_SPL_CONFIG_H +#define __IMX6_SPL_CONFIG_H + +#ifdef CONFIG_SPL + +#define CONFIG_SPL_FRAMEWORK + +/* + * IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF + * - we start at 0x00908000 so as to leave some room for IVT/DCD + * - recommended stack (from IMX6DQRM Figure 8-3) is at 0x0093FFB8 + * - this leaves about 224K for SPL image and stack + */ +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/mx6/u-boot-spl.lds" +#define CONFIG_SPL_TEXT_BASE 0x00908000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0093FFB8 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* NAND support */ +#if defined(CONFIG_SPL_NAND_SUPPORT) +#define CONFIG_SPL_NAND_MXS +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_DMA_SUPPORT +#endif + +/* MMC support */ +#if defined(CONFIG_SPL_MMC_SUPPORT) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* offset 69KB */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024) +#endif + +/* SATA support */ +#if defined(CONFIG_SPL_SATA_SUPPORT) +#define CONFIG_SPL_SATA_BOOT_DEVICE 0 +#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 +#endif + +/* Define the payload for FAT/EXT support */ +#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_LIBDISK_SUPPORT +#endif + +#define CONFIG_SPL_BSS_START_ADDR 0x18200000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x18300000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3200000 /* 50 MB */ +#define CONFIG_SYS_TEXT_BASE 0x17800000 +#endif + +#endif
Add a common header which can hopefully be shared among imx6 SPL users Signed-off-by: Tim Harvey <tharvey@gateworks.com> --- include/configs/imx6_spl.h | 64 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 include/configs/imx6_spl.h