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Tue, 08 Oct 2013 19:48:41 +0900 (KST) X-AuditID: cbfee691-b7f4a6d0000074fc-30-5253e3098008 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id A7.FA.05832.903E3525; Tue, 08 Oct 2013 19:48:41 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MUC00059JCVG700@mmp1.samsung.com>; Tue, 08 Oct 2013 19:48:41 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Date: Tue, 08 Oct 2013 16:20:05 +0530 Message-id: <1381229406-12478-4-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1381229406-12478-1-git-send-email-rajeshwari.s@samsung.com> References: <1381229406-12478-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDLMWRmVeSWpSXmKPExsWyRsSkVpfzcXCQwc/tNhYP5m1js3i4/iaL xa6tLawWHUdaGC2mHP7CYvFtyzZGi+WvN7JbvN3bye7A4TG74SKLx85Zd9k9Fmwq9bhzbQ+b x9k7Oxg9+rasYgxgi+KySUnNySxLLdK3S+DK2PbjJ2PBXKGKvy+uszcw/uftYuTgkBAwkdjZ EdbFyAlkiklcuLeeDcQWEljKKPHgYiJE3ERiz9W1rBDxRYwSixcXdTFyAdldTBKXpjxiApnD BlS08UQCSI2IgITEr/6rjCA2s8BqRokpDVUgtrCAs8SVq6/YQWwWAVWJlh/HwFp5BTwk9sxN gVilKDFjyTOwVk4BT4nbl26xQKz1kPhw/zUryFoJgXXsEu/PHGaCmCMg8W3yIRaIV2QlNh1g hpgjKXFwxQ2WCYzCCxgZVjGKphYkFxQnpReZ6hUn5haX5qXrJefnbmIEhvzpf88m7mC8f8D6 EGMy0LiJzFKiyfnAmMkriTc0NjOyMDUxNTYytzQjTVhJnFe9xTpQSCA9sSQ1OzW1ILUovqg0 J7X4ECMTB6dUA+Oxg/NsXh6O136vZDjhsF1MlcbUiXMOmLy8s/DldqWwFZ+mTb6wessW50ns v//OXm1nLPqrr+7N/VdmPye9dnHcdORwY7qk0RKvRYqSlnNWVEtNT3z88VA9p+/h9DAG16s/ r0T8njh5loqoYs77Y90TpYL7dHJOLzH8+bv8Vz6v0EnhyVbW0esElFiKMxINtZiLihMBpG9T Xo8CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNIsWRmVeSWpSXmKPExsVy+t9jAV3Ox8FBBv+mmlg8mLeNzeLh+pss Fru2trBadBxpYbSYcvgLi8W3LdsYLZa/3shu8XZvJ7sDh8fshossHjtn3WX3WLCp1OPOtT1s Hmfv7GD06NuyijGALaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfV VsnFJ0DXLTMH6CIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8a2Hz8Z C+YKVfx9cZ29gfE/bxcjJ4eEgInEnqtrWSFsMYkL99azgdhCAosYJRYvLupi5AKyu5gkLk15 xNTFyMHBBtSw8UQCSI2IgITEr/6rjCA2s8BqRokpDVUgtrCAs8SVq6/YQWwWAVWJlh/HwFp5 BTwk9sxNgVilKDFjyTOwVk4BT4nbl26xQKz1kPhw/zXrBEbeBYwMqxhFUwuSC4qT0nON9IoT c4tL89L1kvNzNzGCo+qZ9A7GVQ0WhxgFOBiVeHgFDgcFCbEmlhVX5h5ilOBgVhLhDbwfHCTE m5JYWZValB9fVJqTWnyIMRnoqInMUqLJ+cCIzyuJNzQ2MTc1NrU0sTAxsyRNWEmc92CrdaCQ QHpiSWp2ampBahHMFiYOTqkGxtzjEzwPCPBsWVew3UpqRqRCYae/6bq8bS/TI7OsUt4ubHqX 7pLi5CfEULdi1o2PwvM43y4vVfGwj1/hLRXOtNPv9fEJq2+8e7vyL2Pshj0HY4wP5q20sZ+o 8b5YyNSfyW3yz8ePGTwmK852KHq77PiqrEsOS/4t7G1bcaLPaarG4kkzTretNFRiKc5INNRi LipOBAAPJmty7gIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: u-boot-review@google.com, patches@linaro.org, alim.akhtar@samsung.com Subject: [U-Boot] [PATCH 3/4] spi: exynos: Minimise access to SPI FIFO level X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Accessing SPI registers is slow, but access to the FIFO level register in particular seems to be extraordinarily expensive (I measure up to 600ns). Perhaps it is required to synchronise with the SPI byte output logic which might run at 1/8th of the 40MHz SPI speed (just a guess). Reduce access to this register by filling up and emptying FIFOs more completely, rather than just one word each time around the inner loop. Since the rxfifo value will now likely be much greater that what we read before we fill the txfifo, we only fill the txfifo halfway. This is because if the txfifo is empty, but the rxfifo has data in it, then writing too much data to the txfifo may overflow the rxfifo as data arrives. This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari S Shinde --- drivers/spi/exynos_spi.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index d7fdaac..7407d6c 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -247,24 +247,27 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, /* Keep the fifos full/empty. */ spi_get_fifo_levels(regs, &rx_lvl, &tx_lvl); - if (tx_lvl < spi_slave->fifo_size && out_bytes) { + while (tx_lvl < spi_slave->fifo_size/2 && out_bytes) { temp = txp ? *txp++ : 0xff; writel(temp, ®s->tx_data); out_bytes--; + tx_lvl++; } if (rx_lvl > 0) { - temp = readl(®s->rx_data); - if (spi_slave->skip_preamble) { - if (temp == SPI_PREAMBLE_END_BYTE) { - spi_slave->skip_preamble = 0; - stopping = 0; + while (rx_lvl > 0) { + temp = readl(®s->rx_data); + if (spi_slave->skip_preamble) { + if (temp == SPI_PREAMBLE_END_BYTE) { + spi_slave->skip_preamble = 0; + stopping = 0; + } + } else { + if (rxp || stopping) + *rxp++ = temp; + in_bytes--; } - } else { - if (rxp || stopping) - *rxp++ = temp; - in_bytes--; - } - toread--; + toread--; + rx_lvl--; } else if (!toread) { /* * We have run out of input data, but haven't read