diff mbox

[U-Boot] Tegra114: Dalmore: Add voltage reg/PMIC init for various periphs

Message ID 1381175350-9261-1-git-send-email-twarren@nvidia.com
State Rejected
Delegated to: Tom Warren
Headers show

Commit Message

Tom Warren Oct. 7, 2013, 7:49 p.m. UTC
These powerrails are currently needed for kernel boot. This will
be move to a pmic-specific driver (or even better moved to the
kernel) at a later date.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Change-Id: Id1654e6338b11cb22715fa3caba644cfe6e2410b
---
 arch/arm/include/asm/arch-tegra/board.h |   3 +
 board/nvidia/common/board.c             |   4 +
 board/nvidia/dalmore/dalmore.c          | 154 +++++++++++++++++++++++++++-----
 include/configs/dalmore.h               |   3 +
 4 files changed, 140 insertions(+), 24 deletions(-)

Comments

Stephen Warren Oct. 7, 2013, 8:22 p.m. UTC | #1
On 10/07/2013 01:49 PM, Tom Warren wrote:
> These powerrails are currently needed for kernel boot. This will
> be move to a pmic-specific driver (or even better moved to the
> kernel) at a later date.

Which kernel? The upstream kernel has been booting on Dalmore without
issue for quite a long time, without this patch.

If some other kernel needs some voltage rails to be enabled in order to
use certain hardware, it must be modified to enable them itself. We
should not hack around kernel deficiencies in the bootloader. A kernel
should be able to boot without any bootloader at all.
Tom Warren Oct. 7, 2013, 11:43 p.m. UTC | #2
As Stephen points out, the PMIC/vreg settings aren't needed to boot an
upstream kernel, so I'm dropping this patch.

Thanks


On Mon, Oct 7, 2013 at 1:22 PM, Stephen Warren <swarren@wwwdotorg.org>wrote:

> On 10/07/2013 01:49 PM, Tom Warren wrote:
> > These powerrails are currently needed for kernel boot. This will
> > be move to a pmic-specific driver (or even better moved to the
> > kernel) at a later date.
>
> Which kernel? The upstream kernel has been booting on Dalmore without
> issue for quite a long time, without this patch.
>
> If some other kernel needs some voltage rails to be enabled in order to
> use certain hardware, it must be modified to enable them itself. We
> should not hack around kernel deficiencies in the bootloader. A kernel
> should be able to boot without any bootloader at all.
>
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-tegra/board.h b/arch/arm/include/asm/arch-tegra/board.h
index 0e69864..b148b25 100644
--- a/arch/arm/include/asm/arch-tegra/board.h
+++ b/arch/arm/include/asm/arch-tegra/board.h
@@ -29,4 +29,7 @@  void pin_mux_spi(void);      /* overrideable SPI pinmux setup     */
 void pin_mux_nand(void);     /* overrideable NAND pinmux setup    */
 void pin_mux_display(void);  /* overrideable DISPLAY pinmux setup */
 
+/* Enable needed power rails */
+void board_vreg_init(void);
+
 #endif
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 126e56e..c479958 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -151,6 +151,10 @@  int board_init(void)
 # endif /* CONFIG_TEGRA_PMU */
 #endif /* CONFIG_SYS_I2C_TEGRA */
 
+#ifdef CONFIG_TEGRA114
+	/* Enable needed power rails. TBD: Move to kernel or driver init. */
+	board_vreg_init();
+#endif
 #ifdef CONFIG_USB_EHCI_TEGRA
 	pin_mux_usb();
 	board_usb_init(gd->fdt_blob);
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 2c23a29..27f9ab2 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -15,8 +15,10 @@ 
  */
 
 #include <common.h>
-#include <asm/arch/pinmux.h>
+#include <asm-generic/gpio.h>
+#include <asm/arch/gpio.h>
 #include <asm/arch/gp_padctrl.h>
+#include <asm/arch/pinmux.h>
 #include "pinmux-config-dalmore.h"
 #include <i2c.h>
 
@@ -42,6 +44,20 @@  void pinmux_init(void)
 	padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl));
 }
 
+/* Writes val to reg @ chip address pmu */
+void i2c_write_pmic(uchar pmu, uchar reg, uchar val)
+{
+	uchar data_buffer[1];
+	int ret;
+
+	data_buffer[0] = val;
+
+	ret = i2c_write(pmu, reg, 1, data_buffer, 1);
+	if (ret)
+		printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
+			__func__, reg, data_buffer[0], ret);
+}
+
 #if defined(CONFIG_TEGRA_MMC)
 /*
  * Do I2C/PMU writes to bring up SD card bus power
@@ -49,39 +65,129 @@  void pinmux_init(void)
  */
 void board_sdmmc_voltage_init(void)
 {
-	uchar reg, data_buffer[1];
-	int ret;
-
-	ret = i2c_set_bus_num(0);/* PMU is on bus 0 */
+	int ret = i2c_set_bus_num(0);	/* PMU is on bus 0 */
 	if (ret)
 		printf("%s: i2c_set_bus_num returned %d\n", __func__, ret);
 
 	/* TPS65913: LDO9_VOLTAGE = 3.3V */
-	data_buffer[0] = 0x31;
-	reg = 0x61;
-
-	ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1);
-	if (ret)
-		printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
-			__func__, reg, data_buffer[0], ret);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x61, 0x31);
 
 	/* TPS65913: LDO9_CTRL = Active */
-	data_buffer[0] = 0x01;
-	reg = 0x60;
-
-	ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1);
-	if (ret)
-		printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
-			__func__, reg, data_buffer[0], ret);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x60, 0x01);
 
 	/* TPS65090: FET6_CTRL = enable output auto discharge, enable FET6 */
-	data_buffer[0] = 0x03;
-	reg = 0x14;
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x14, 0x03);
+}
 
-	ret = i2c_write(BAT_I2C_ADDRESS, reg, 1, data_buffer, 1);
+void board_vreg_init(void)
+{
+	int ret = i2c_set_bus_num(0);	/* PMU is on bus 0 */
 	if (ret)
-		printf("%s: BAT i2c_write %02X<-%02X returned %d\n",
-			__func__, reg, data_buffer[0], ret);
+		printf("%s: i2c_set_bus_num returned %d\n", __func__, ret);
+
+	/*
+	 * Enable USB voltage: AVDD_USB_HDMI for AVDD_USB_AP
+	 *			and AVDD_HDMI_AP
+	 *   LDOUSB_VOLTAGE = 3.3v
+	 *   LDOUSB_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x65, 0x31);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x64, 0x01);
+
+	/*
+	 * Enable HVDD_USB3 voltage: HVDD_USB3_AP
+	 *   LDOLN_VOLTAGE = 3.3v
+	 *   LDOLN_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x63, 0x31);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x62, 0x01);
+
+	/*
+	 * Enable additional VDD_1V1_CORE
+	 *
+	 *   SMPS7_CTRL: enable active: auto
+	 *
+	 *   VDD_CORE is provided by SMPS4_SW, 5 and 7 where
+	 *   4 and 5 are enabled after power on.
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x30, 0x05);
+
+	/*
+	 * Set and enable AVDD_2V8_CAM1
+	 *   LDO1_VOLTAGE = 2.8v
+	 *   LDO1_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x51, 0x27);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x50, 0x01);
+
+	/*
+	 * Set and enable AVDD_2V8_CAM2
+	 *   LDO2_VOLTAGE = 2.8v
+	 *   LDO2_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x53, 0x27);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x52, 0x01);
+
+	/*
+	 * Set and enable AVDD_1V2 for VDDIO_HSIC_AP and AVDD_DSI_CSI_AP
+	 *   LDO3_VOLTAGE = 1.2v
+	 *   LDO3_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x55, 0x07);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x54, 0x01);
+
+	/*
+	 * Set and enable VPP_FUSE_APP
+	 *   LDO4_VOLTAGE = 1.8v
+	 *   LDO4_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x57, 0x13);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x56, 0x01);
+
+	/*
+	 * Set and enable VDD_1V2_LCD
+	 *   LDO5_VOLTAGE = 1.2v (TPS65913)
+	 *   LDO5_CTRL = Active
+	 *
+	 * Enable VDD_LCD_BL
+	 *   VOUT1 (FET1) (TPS65090): auto discharge and enable
+	 *
+	 * Enable AVDD_LCD
+	 *   VOUT4 (FET4) (TPS65090): auto discharge and enable
+	 *
+	 * Enable VDD_LVDS
+	 *   VOUT5 (FET5) (TPS65090): auto discharge and enable
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x59, 0x07); /* LDO5_VOLTAGE */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x58, 0x01); /* LD05_CTRL */
+	i2c_write_pmic(BAT_I2C_ADDRESS, 0x0F, 0x03); /* VOUT1 (FET1) */
+	i2c_write_pmic(BAT_I2C_ADDRESS, 0x12, 0x03); /* VOUT4 (FET4) */
+	i2c_write_pmic(BAT_I2C_ADDRESS, 0x13, 0x03); /* VOUT5 (FET5) */
+
+	/*
+	 * Set and enable VDD_SENSOR
+	 *   LDO6_VOLTAGE = 2.85v
+	 *   LDO6_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x5B, 0x28);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x5A, 0x01);
+
+	/*
+	 * Set and enable AVDD_2V8_CAM_AF1
+	 *   LDO7_VOLTAGE = 2.8v
+	 *   LDO7_CTRL = Active
+	 */
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x5D, 0x27);
+	i2c_write_pmic(PMU_I2C_ADDRESS, 0x5C, 0x01);
+
+	/*
+	 * Enable VDD_3V3_COM
+	 *   VOUT7 (FET7) (TPS65090): auto discharge and enable
+	 */
+	i2c_write_pmic(BAT_I2C_ADDRESS, 0x15, 0x03);
+
+	/* Enable LCD backlight */
+	gpio_direction_output(DSI_PANEL_BL_EN_GPIO, 1);
 }
 
 /*
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index bdf012b..ec285b0 100644
--- a/include/configs/dalmore.h
+++ b/include/configs/dalmore.h
@@ -87,6 +87,9 @@ 
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_DHCP
 
+/* Backlight enable GPIO. TBD - move to DT when LCD driver added */
+#define DSI_PANEL_BL_EN_GPIO		GPIO_PH2
+
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */