From patchwork Wed Jul 24 19:22:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ash Charles X-Patchwork-Id: 261512 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E311C2C0090 for ; Thu, 25 Jul 2013 05:28:54 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CCF174A01E; Wed, 24 Jul 2013 21:28:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id H6uxkjzZtYwI; Wed, 24 Jul 2013 21:28:52 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1FAA54A01F; Wed, 24 Jul 2013 21:28:48 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BD57F4A01F for ; Wed, 24 Jul 2013 21:28:45 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SN1JE1Zp0s3D for ; Wed, 24 Jul 2013 21:28:39 +0200 (CEST) X-Greylist: delayed 329 seconds by postgrey-1.27 at theia; Wed, 24 Jul 2013 21:28:31 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f172.google.com (mail-pd0-f172.google.com [209.85.192.172]) by theia.denx.de (Postfix) with ESMTPS id 39F174A01E for ; Wed, 24 Jul 2013 21:28:31 +0200 (CEST) Received: by mail-pd0-f172.google.com with SMTP id z10so749546pdj.31 for ; Wed, 24 Jul 2013 12:28:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=brCU4gJ919gCVlX7txcP/49QPK7w5NP9fFZb3beZls4=; b=KM8MQkTIWeq0fgkazBjDnkYENFYhbylXN1pzrXFQBeBTe2vKNUh+wxMBLox+cx8nIn gL41hSZEV6KXm1cuNOhMnFBU57Z6eQC5Xpth+ayvcYvl6VXLa6DSEuQ+BHF4zuM2uDYV bAit7Sbw+ZLGqqkAANOU3/GzK0ClFnJ9/WsXRj2v7JvIu0yxHybfnBZONlHFj08fsf2G q28Bf7oYHgY+T8nLdzcN+Ofe2X3tBdqML5uZ10ShY/wmqbq/hTUp/6aiKuhYkzEtF83Q xnO6ISUa6SZxYLPGHn0/btrygAgHKl2k3t5x3wh+Ijtg83CHGpsGv/vwkVD+OYkfjxkB 5XZw== X-Received: by 10.66.149.198 with SMTP id uc6mr45082127pab.61.1374693780816; Wed, 24 Jul 2013 12:23:00 -0700 (PDT) Received: from gumstux.localdomain (adsl-172-15-162-30.dsl.pltn13.sbcglobal.net. [172.15.162.30]) by mx.google.com with ESMTPSA id ys4sm49498451pbb.9.2013.07.24.12.22.59 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 24 Jul 2013 12:23:00 -0700 (PDT) Received: by gumstux.localdomain (Postfix, from userid 1000) id 923B826390B; Wed, 24 Jul 2013 12:22:58 -0700 (PDT) From: ash@gumstix.com To: u-boot@lists.denx.de Date: Wed, 24 Jul 2013 12:22:35 -0700 Message-Id: <1374693755-16275-2-git-send-email-ash@gumstix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374693755-16275-1-git-send-email-ash@gumstix.com> References: <1374693755-16275-1-git-send-email-ash@gumstix.com> Cc: Ash Charles Subject: [U-Boot] [PATCH 2/2] omap: overo: Use 200MHz SDRC timings for revision 1, 2 & 3 boards X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Ash Charles Gumstix uses 200Mhz RAM on revision 1, 2 & 3 COMs, so use 200MHz timings rather than 165MHz. Based on 6cf8bf44b1f8550e12f7f2a16e01890e5de8443d Signed-off-by: Ash Charles --- board/overo/overo.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/board/overo/overo.c b/board/overo/overo.c index 8df077d..c70fcc3 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -158,16 +158,16 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */ - timings->mcfg = MICRON_V_MCFG_165(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = MICRON_V_MCFG_200(256 << 20); + timings->ctrla = MICRON_V_ACTIMA_200; + timings->ctrlb = MICRON_V_ACTIMB_200; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */ - timings->mcfg = HYNIX_V_MCFG_165(256 << 20); - timings->ctrla = HYNIX_V_ACTIMA_165; - timings->ctrlb = HYNIX_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = HYNIX_V_MCFG_200(256 << 20); + timings->ctrla = HYNIX_V_ACTIMA_200; + timings->ctrlb = HYNIX_V_ACTIMB_200; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */ timings->mcfg = MCFG(512 << 20, 15);