From patchwork Fri Jun 7 10:56:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 249661 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2B2492C007B for ; Fri, 7 Jun 2013 21:11:10 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CF1054A03A; Fri, 7 Jun 2013 13:11:08 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Fiq8jSKPWXKQ; Fri, 7 Jun 2013 13:11:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 110894A02E; Fri, 7 Jun 2013 13:11:06 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 177214A02E for ; Fri, 7 Jun 2013 13:10:58 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9i6rQV7QEJ61 for ; Fri, 7 Jun 2013 13:10:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by theia.denx.de (Postfix) with ESMTPS id 8A84B4A02D for ; Fri, 7 Jun 2013 13:10:44 +0200 (CEST) Received: by mail-pd0-f175.google.com with SMTP id 4so4649301pdd.6 for ; Fri, 07 Jun 2013 04:10:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=dzWh9JfT0jrJm7zWOuimQ/hY+oY+iQsFhTBM85n5QdM=; b=iN6U0QcZ6ahBiTEapfQ/xlI9+rXXRCKHO4L2zw1SUBkq0GxD5n+hyRPteWOgxxUAIb ej2kmUaX19U+XYX/2gQkfBV51+tguVplACNEscOZu6Ccz+hwoqMBtc4emxBKS12X++S9 dVts/5LUl8rAZLgPI2jMsJs0nB+IsaSpPjJPpbFv19N/4MKVSGr8Ou3weKW0bXRMnC96 s0M9S/EOshsqUf+2kpCzDXQxGVXINoIA89dXo2cGrPOkhp96hRwmaL6MZqetuWWI1HFd p5hdJCL8ETHZxbympmVN+Aqvyy6G5bd2tmfZ2SzNmRozHB2sGc6J46c5EOOqpzPw0oYx YYig== X-Received: by 10.68.136.3 with SMTP id pw3mr37208405pbb.2.1370603442652; Fri, 07 Jun 2013 04:10:42 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id vv6sm2701272pab.6.2013.06.07.04.10.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 07 Jun 2013 04:10:41 -0700 (PDT) From: Tushar Behera To: u-boot@lists.denx.de Date: Fri, 7 Jun 2013 16:26:21 +0530 Message-Id: <1370602582-6332-1-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQkr1sPNQooY0yWMZ6CQL5YuACLQt2yFUpG/yuhMGXf2P6PjtLjtuVrY6JldE/yDgx/tuj+0 Cc: k.chander@samsung.com, patches@linaro.org Subject: [U-Boot] [PATCH] Origen: Set FIMD as the default display path X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de On EXYNOS4210, there are three paths for display data to be processed, namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller is used. Signed-off-by: Tushar Behera --- This patch is rebased on master branch of u-boot-samsung tree. board/samsung/origen/lowlevel_init.S | 13 +++++++++++++ board/samsung/origen/origen_setup.h | 7 +++++++ 2 files changed, 20 insertions(+) diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S index be9d418..a7ea680 100644 --- a/board/samsung/origen/lowlevel_init.S +++ b/board/samsung/origen/lowlevel_init.S @@ -89,6 +89,7 @@ lowlevel_init: bl uart_asm_init bl arch_cpu_init bl tzpc_init + bl display_init pop {pc} wakeup_reset: @@ -96,6 +97,7 @@ wakeup_reset: bl mem_ctrl_asm_init bl arch_cpu_init bl tzpc_init + bl display_init exit_wakeup: /* Load return address and jump to kernel */ @@ -355,3 +357,14 @@ uart_asm_init: nop nop +/* Setting default display path to FIMD */ +display_init: + push {lr} + ldr r0, =EXYNOS4_SYSREG_BASE + + /* DISPLAY_CONTROL */ + ldr r1, =DISPLAY_CONTROL_VAL + ldr r2, =DISPLAY_CONTROL_OFFSET + str r1, [r0, r2] + + pop {pc} diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h index 926a4cc..b0e1bc2 100644 --- a/board/samsung/origen/origen_setup.h +++ b/board/samsung/origen/origen_setup.h @@ -83,6 +83,8 @@ #define VPLL_CON0_OFFSET 0xC120 #define VPLL_CON1_OFFSET 0xC124 +#define DISPLAY_CONTROL_OFFSET 0x210 + /* DMC: DRAM Controllor Register offsets */ #define DMC_CONCONTROL 0x00 #define DMC_MEMCONTROL 0x04 @@ -485,6 +487,11 @@ | (VPLL_MRR << 24) \ | (VPLL_MFR << 16) \ | (VPLL_K << 0)) + +/* DISPLAY_CONTROL */ +#define FIMDBYPASS_LBLK0 0x1 +#define DISPLAY_CONTROL_VAL (FIMDBYPASS_LBLK0 << 1) + /* * UART GPIO_A0/GPIO_A1 Control Register Value * 0x2: UART Function