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Fri, 17 May 2013 21:46:41 +0900 (KST) X-AuditID: cbfee690-b7efc6d000006d92-7f-519626b11f19 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id FD.F4.17674.1B626915; Fri, 17 May 2013 21:46:41 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MMY004NE0QITT10@mmp2.samsung.com>; Fri, 17 May 2013 21:46:41 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Fri, 17 May 2013 18:22:58 +0530 Message-id: <1368795178-25909-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1368795178-25909-1-git-send-email-rajeshwari.s@samsung.com> References: <1368795178-25909-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrDLMWRmVeSWpSXmKPExsWyRsSkTnej2rRAgze/LCw6jrQwWkw5/IXF 4tuWbYwWy19vZLd4u7eT3YHVY3bDRRaPBZtKPe5c28PmcfbODkaPvi2rGANYo7hsUlJzMstS i/TtErgyNp5dwFhwRqJi9XreBsZekS5GTg4JAROJKVM2skPYYhIX7q1n62Lk4hASWMoo0bFj FTNM0Y2Vl5ghEtMZJRqn3WCHcCYySZy9txesik3ASGLryWmMILaIgITEr/6rYDazQJTE9+5L YCuEBVwlTl2cCFbPIqAq8WXVNSYQm1fAQ6Jj8wImiG0KEsemfmUFsTkFPCUunv4J1isEVDPp +HKwKyQEutkl5v24wwQxSEDi2+RDLF2MHEAJWYlNB6CulpQ4uOIGywRG4QWMDKsYRVMLkguK k9KLTPSKE3OLS/PS9ZLzczcxAkP69L9nE3Yw3jtgfYgxGWjcRGYp0eR8YEzklcQbGpsZWZia mBobmVuakSasJM6r3mIdKCSQnliSmp2aWpBaFF9UmpNafIiRiYNTqoFRXJtfaNe7tU0x/76s aZyWfHjL98olmsX9DN8fBR7JCc0u4my/uFd+xZ9Hf53ERbO/vNTvYl+0t39e0b7JF49oTCu5 XRN2oPvrFUWT58p+82oD7QUsPix4zlK7YLOh5w+exTcrFS6YVO+fmBX58F/Yxoe2ugtsFt3h mC/Dr/2wUOTP2fVbgxnjlFiKMxINtZiLihMB6fk1a38CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJIsWRmVeSWpSXmKPExsVy+t9jQd2NatMCDfqO6lt0HGlhtJhy+AuL xbct2xgtlr/eyG7xdm8nuwOrx+yGiyweCzaVety5tofN4+ydHYwefVtWMQawRjUw2mSkJqak Fimk5iXnp2TmpdsqeQfHO8ebmhkY6hpaWpgrKeQl5qbaKrn4BOi6ZeYAbVdSKEvMKQUKBSQW Fyvp22GaEBripmsB0xih6xsSBNdjZIAGEtYwZmw8u4Cx4IxExer1vA2MvSJdjJwcEgImEjdW XmKGsMUkLtxbz9bFyMUhJDCdUaJx2g12CGcik8TZe3vBqtgEjCS2npzGCGKLCEhI/Oq/CmYz C0RJfO++xA5iCwu4Spy6OBGsnkVAVeLLqmtMIDavgIdEx+YFTBDbFCSOTf3KCmJzCnhKXDz9 E6xXCKhm0vHlzBMYeRcwMqxiFE0tSC4oTkrPNdIrTswtLs1L10vOz93ECI6YZ9I7GFc1WBxi FOBgVOLhVfg5JVCINbGsuDL3EKMEB7OSCO/xj1MDhXhTEiurUovy44tKc1KLDzEmA101kVlK NDkfGM15JfGGxibmpsamliYWJmaWpAkrifMebLUOFBJITyxJzU5NLUgtgtnCxMEp1cBoYjR3 RlYRC8/LkzPVS1qbnqR5tVrE5bRNuvo+U1+ecV7+r8+RPeaC+yYd3sY4NzRe4O0W3j/qd8wi UzOuLqxUNZX1TGrs/X4pZcX64hvteZL7ZK/l3FjRJsa3QT7E4NOVYJF5PLb75C0TLMyaN3pk XDnxaGLyam439RCVwrt/W84vO/jyyn8lluKMREMt5qLiRACmpEHW3AIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: u-boot-review@google.com, patches@linaro.org Subject: [U-Boot] [PATCH 2/2 V2] EXYNOS: SPI: Support a delay after deactivate X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de For devices that need some time to react after a spi transaction finishes, add the ability to set a delay. Implement this as a delay on the first/next transaction to avoid any delay in the fairly common case where a SPI transaction is followed by other processing. Based on: "EXYNOS: SPI: Support SPI_PREAMBLE mode" link: http://patchwork.ozlabs.org/patch/229891/ Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde --- Changes in V2: - None. drivers/spi/exynos_spi.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index e81b132..119bf0f 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -38,6 +38,7 @@ struct spi_bus { struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ int node; + uint deactivate_delay_us; /* Delay to wait after deactivate */ }; /* A list of spi buses that we know about */ @@ -52,6 +53,8 @@ struct exynos_spi_slave { enum periph_id periph_id; /* Peripheral ID for this device */ unsigned int fifo_size; int skip_preamble; + struct spi_bus *bus; /* Pointer to our SPI bus info */ + ulong last_transaction_us; /* Time of last transaction end */ }; static struct spi_bus *spi_get_bus(unsigned dev_index) @@ -97,6 +100,7 @@ struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, } bus = &spi_bus[busnum]; + spi_slave->bus = bus; spi_slave->regs = bus->regs; spi_slave->mode = mode; spi_slave->periph_id = bus->periph_id; @@ -107,6 +111,7 @@ struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, spi_slave->fifo_size = 256; spi_slave->skip_preamble = 0; + spi_slave->last_transaction_us = timer_get_us(); spi_slave->freq = bus->frequency; if (max_hz) @@ -368,9 +373,21 @@ void spi_cs_activate(struct spi_slave *slave) { struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); + /* If it's too soon to do another transaction, wait */ + if (spi_slave->bus->deactivate_delay_us && + spi_slave->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - spi_slave->last_transaction_us; + if (delay_us < spi_slave->bus->deactivate_delay_us) + udelay(spi_slave->bus->deactivate_delay_us - delay_us); + } clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); debug("Activate CS, bus %d\n", spi_slave->slave.bus); spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; + + /* Remember time of this transaction so we can honour the bus delay */ + if (spi_slave->bus->deactivate_delay_us) + spi_slave->last_transaction_us = timer_get_us(); } /** @@ -420,6 +437,8 @@ static int spi_get_config(const void *blob, int node, struct spi_bus *bus) /* Use 500KHz as a suitable default */ bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 500000); + bus->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); return 0; }