diff mbox

[U-Boot,v4,10/10] imx: Document fuse assignments for MAC addresses

Message ID 1366748267-27634-10-git-send-email-benoit.thebaudeau@advansee.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Benoît Thébaudeau April 23, 2013, 8:17 p.m. UTC 
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
---
Changes in v4:
 - Word as "i.MX6 SoC" instead of as "i.MX6x SoCs".

Changes in v3:
 - New patch.

Changes in v2: None

 doc/README.imx25 |   10 ++++++++++
 doc/README.imx27 |   10 ++++++++++
 doc/README.imx5  |    6 ++++++
 doc/README.imx6  |   10 ++++++++++
 4 files changed, 36 insertions(+)
 create mode 100644 doc/README.imx25
 create mode 100644 doc/README.imx27
 create mode 100644 doc/README.imx6

Comments

Stefano Babic April 28, 2013, 9:10 a.m. UTC | #1 
On 23/04/2013 22:17, Benoît Thébaudeau wrote:
> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
> ---
Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/doc/README.imx25 b/doc/README.imx25
new file mode 100644
index 0000000..0ca21b6
--- /dev/null
+++ b/doc/README.imx25
@@ -0,0 +1,10 @@ 
+U-Boot for Freescale i.MX25
+
+This file contains information for the port of U-Boot to the Freescale i.MX25
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 26 to 31 of fuse bank 0, using the
+    natural MAC byte order (i.e. MSB first).
diff --git a/doc/README.imx27 b/doc/README.imx27
new file mode 100644
index 0000000..6f92cb4
--- /dev/null
+++ b/doc/README.imx27
@@ -0,0 +1,10 @@ 
+U-Boot for Freescale i.MX27
+
+This file contains information for the port of U-Boot to the Freescale i.MX27
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 4 to 9 of fuse bank 0, using the
+    reversed MAC byte order (i.e. LSB first).
diff --git a/doc/README.imx5 b/doc/README.imx5
index e08941e..c5312b6 100644
--- a/doc/README.imx5
+++ b/doc/README.imx5
@@ -20,3 +20,9 @@  i.MX5x SoCs.
     This option should be enabled for boards having a SYS_ON_OFF_CTL signal
     connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
     reference designs.
+
+2. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
+    natural MAC byte order (i.e. MSB first).
diff --git a/doc/README.imx6 b/doc/README.imx6
new file mode 100644
index 0000000..513a06e
--- /dev/null
+++ b/doc/README.imx6
@@ -0,0 +1,10 @@ 
+U-Boot for Freescale i.MX6
+
+This file contains information for the port of U-Boot to the Freescale i.MX6
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
+    16 msbs in word 3.