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Fri, 22 Mar 2013 21:24:08 +0900 (KST) X-AuditID: cbfee691-b7f5f6d000002fda-c5-514c4d688e1e Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 45.85.17838.86D4C415; Fri, 22 Mar 2013 21:24:08 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MK200CQVAD0C220@mmp1.samsung.com>; Fri, 22 Mar 2013 21:24:08 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Fri, 22 Mar 2013 17:58:17 +0530 Message-id: <1363955297-3707-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1363955297-3707-1-git-send-email-rajeshwari.s@samsung.com> References: <1363955297-3707-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGLMWRmVeSWpSXmKPExsWyRsSkSjfD1yfQ4N5WM4uH62+yWHQcaWG0 mHL4C4vFty3bGC3e7u1kd2D1mN1wkcXjzrU9bB5n7+xg9OjbsooxgCWKyyYlNSezLLVI3y6B K+PS5A9sBSslKg5NesTewPhVuIuRk0NCwETiweJZTBC2mMSFe+vZuhi5OIQEljJKPDk+mbWL kQOsqG21O0iNkMAiRokT+20haiYySfxua2MESbAJGElsPTkNzBYRkJD41X8VzGYWiJF4vf8H G8gcYQEniRlzfUHCLAKqEneuv2MDsXkF3CWmXHvDCnGDgsSxqV/BbE4BD4nl734yQux1lzj7 5A47yF4JgWZ2ibYXXYwQgwQkvk0+xAJxp6zEpgPMEHMkJQ6uuMEygVF4ASPDKkbR1ILkguKk 9CJTveLE3OLSvHS95PzcTYzAMD7979nEHYz3D1gfYkwGGjeRWUo0OR8YB3kl8YbGZkYWpiam xkbmlmakCSuJ86q3WAcKCaQnlqRmp6YWpBbFF5XmpBYfYmTi4JRqYFzAJ7Njd9vlMw/6Ih4u 2Xsgro7BK6dOMF7Dz5LbWOnDtr6PCv/nfaq88XVNzkeDO7XMu39mPmv/IxhSXPDx1lQJ+wXZ rb2fVATjTHPYZ++L27gn57ONewxHxMSGfybOed4ulgI72kUP21x7/8pZ7faKuEd79fezr6h/ lhHvutTil84//7dsF5RYijMSDbWYi4oTAV3TP6R5AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrMIsWRmVeSWpSXmKPExsVy+t9jAd0MX59AgwX7dSwerr/JYtFxpIXR YsrhLywW37ZsY7R4u7eT3YHVY3bDRRaPO9f2sHmcvbOD0aNvyyrGAJaoBkabjNTElNQihdS8 5PyUzLx0WyXv4HjneFMzA0NdQ0sLcyWFvMTcVFslF58AXbfMHKDNSgpliTmlQKGAxOJiJX07 TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaMS5M/sBWslKg4NOkRewPjV+EuRg4OCQETibbV7l2M nECmmMSFe+vZQGwhgUWMEif223YxcgHZE5kkfre1MYIk2ASMJLaenAZmiwhISPzqvwpmMwvE SLze/4MNZKawgJPEjLm+IGEWAVWJO9ffgc3kFXCXmHLtDSvELgWJY1O/gtmcAh4Sy9/9ZITY 6y5x9skd9gmMvAsYGVYxiqYWJBcUJ6XnGuoVJ+YWl+al6yXn525iBEfJM6kdjCsbLA4xCnAw KvHwauh4BwqxJpYVV+YeYpTgYFYS4V1t7RMoxJuSWFmVWpQfX1Sak1p8iDEZ6KqJzFKiyfnA CM4riTc0NjE3NTa1NLEwMbMkTVhJnPdAq3WgkEB6YklqdmpqQWoRzBYmDk6pBsbuwAy7KXzP kxwUVswNTlpzgbdzd8qi3dz3yqdUbjr6Jywn0MJPxP1HfXDd+reb0yQlxO1i2BdolG5TKVGy 3Hbwz2nH246PudJ2NKzOWRPYm1iz+NO6czKSrG+yrf++ulq49kdAvGDxu/j0BUWPc2zLJRKn 9jY6P3yWxsWvrLrHdGHtgl0bOZVYijMSDbWYi4oTATs5ktzWAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: patches@linaro.org Subject: [U-Boot] [PATCH 2/2] EXYNOS: SPI: Support a delay after deactivate X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de For devices that need some time to react after a spi transaction finishes, add the ability to set a delay. Implement this as a delay on the first/next transaction to avoid any delay in the fairly common case where a SPI transaction is followed by other processing. Based on: "EXYNOS: SPI: Support SPI_PREAMBLE mode" link: http://patchwork.ozlabs.org/patch/229891/ Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- drivers/spi/exynos_spi.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 09e88d5..c19e227 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -38,6 +38,7 @@ struct spi_bus { struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ int node; + uint deactivate_delay_us; /* Delay to wait after deactivate */ }; /* A list of spi buses that we know about */ @@ -52,6 +53,8 @@ struct exynos_spi_slave { enum periph_id periph_id; /* Peripheral ID for this device */ unsigned int fifo_size; int skip_preamble; + struct spi_bus *bus; /* Pointer to our SPI bus info */ + ulong last_transaction_us; /* Time of last transaction end */ }; static struct spi_bus *spi_get_bus(unsigned dev_index) @@ -97,6 +100,7 @@ struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, } bus = &spi_bus[busnum]; + spi_slave->bus = bus; spi_slave->slave.bus = busnum; spi_slave->slave.cs = cs; spi_slave->regs = bus->regs; @@ -109,6 +113,7 @@ struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, spi_slave->fifo_size = 256; spi_slave->skip_preamble = 0; + spi_slave->last_transaction_us = timer_get_us(); spi_slave->freq = bus->frequency; if (max_hz) @@ -370,9 +375,21 @@ void spi_cs_activate(struct spi_slave *slave) { struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); + /* If it's too soon to do another transaction, wait */ + if (spi_slave->bus->deactivate_delay_us && + spi_slave->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - spi_slave->last_transaction_us; + if (delay_us < spi_slave->bus->deactivate_delay_us) + udelay(spi_slave->bus->deactivate_delay_us - delay_us); + } clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); debug("Activate CS, bus %d\n", spi_slave->slave.bus); spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; + + /* Remember time of this transaction so we can honour the bus delay */ + if (spi_slave->bus->deactivate_delay_us) + spi_slave->last_transaction_us = timer_get_us(); } /** @@ -421,6 +438,8 @@ static int spi_get_config(const void *blob, int node, struct spi_bus *bus) /* Use 500KHz as a suitable default */ bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 500000); + bus->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); return 0; }