From patchwork Thu Mar 21 08:03:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 229576 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A27BD2C007C for ; Thu, 21 Mar 2013 19:04:07 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ABD884A088; Thu, 21 Mar 2013 09:04:04 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id A0R5FXW9bEVf; Thu, 21 Mar 2013 09:04:04 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E8E334A04C; Thu, 21 Mar 2013 09:04:02 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8042F4A04C for ; Thu, 21 Mar 2013 09:04:01 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lpbFEeLYvkEX for ; Thu, 21 Mar 2013 09:04:00 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp6-v.fe.bosch.de (smtp6-v.fe.bosch.de [139.15.237.11]) by theia.denx.de (Postfix) with ESMTPS id 618B94A049 for ; Thu, 21 Mar 2013 09:03:59 +0100 (CET) Received: from vsmta14.fe.internet.bosch.com (unknown [10.4.98.54]) by imta23.fe.bosch.de (Postfix) with ESMTP id 9B4B7158016B for ; Thu, 21 Mar 2013 09:03:58 +0100 (CET) Received: from localhost (vsgw3.fe.internet.bosch.com [10.4.98.16]) by vsmta14.fe.internet.bosch.com (Postfix) with SMTP id 9026BA40A96 for ; Thu, 21 Mar 2013 09:03:58 +0100 (CET) Received: from SI-HUB1000.de.bosch.com (10.4.103.106) by si-hub03.de.bosch.com (10.3.144.92) with Microsoft SMTP Server (TLS) id 8.3.298.1; Thu, 21 Mar 2013 09:03:47 +0100 Received: from hi-z5661.hi.de.bosch.com (10.34.217.143) by SI-HUB1000.de.bosch.com (10.4.103.106) with Microsoft SMTP Server id 14.2.328.9; Thu, 21 Mar 2013 09:03:46 +0100 Received: from localhost.localdomain (localhost [127.0.0.1]) by hi-z5661.hi.de.bosch.com (Postfix) with ESMTP id 69A6D40D36; Thu, 21 Mar 2013 09:03:46 +0100 (CET) From: Dirk Behme To: Date: Thu, 21 Mar 2013 09:03:44 +0100 Message-ID: <1363853024-26432-1-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 Cc: Fabio Estevam , Dirk Behme Subject: [U-Boot] [PATCH] spi: mxc_spi: Fix ECSPI reset handling X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme CC: Stefano Babic CC: Fabio Estevam --- drivers/spi/mxc_spi.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index d792d8d..cb48019 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -137,11 +137,11 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, return -1; } - reg_ctrl = reg_read(®s->ctrl); - /* Reset spi */ - reg_write(®s->ctrl, (reg_ctrl & ~MXC_CSPICTRL_EN)); - reg_write(®s->ctrl, (reg_ctrl | MXC_CSPICTRL_EN)); + reg_write(®s->ctrl, 0); + reg_write(®s->ctrl, MXC_CSPICTRL_EN); + + reg_ctrl = reg_read(®s->ctrl); /* * The following computation is taken directly from Freescale's code.