From patchwork Wed Feb 13 06:40:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 220061 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5EF352C0297 for ; Wed, 13 Feb 2013 17:33:37 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D11D24A1D2; Wed, 13 Feb 2013 07:33:35 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PngjB+LX67PO; Wed, 13 Feb 2013 07:33:35 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DF0694A1DA; Wed, 13 Feb 2013 07:33:33 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AA9A64A1DA for ; Wed, 13 Feb 2013 07:33:31 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 70M445mO7vUy for ; Wed, 13 Feb 2013 07:33:31 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by theia.denx.de (Postfix) with ESMTP id 5EEF44A1D2 for ; Wed, 13 Feb 2013 07:33:30 +0100 (CET) Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MI500D9QBJ4URL0@mailout3.samsung.com> for u-boot@lists.denx.de; Wed, 13 Feb 2013 15:33:22 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id CB.6B.03918.2B33B115; Wed, 13 Feb 2013 15:33:22 +0900 (KST) X-AuditID: cbfee61a-b7f7d6d000000f4e-7f-511b33b29ae5 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 1B.6B.03918.2B33B115; Wed, 13 Feb 2013 15:33:22 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MI500AP7BHNX840@mmp2.samsung.com> for u-boot@lists.denx.de; Wed, 13 Feb 2013 15:33:22 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Wed, 13 Feb 2013 12:10:02 +0530 Message-id: <1360737602-19085-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1360737602-19085-1-git-send-email-rajeshwari.s@samsung.com> References: <1360737602-19085-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrELMWRmVeSWpSXmKPExsWyRsSkTneTsXSgwd1tshZv93ayOzB6nL2z gzGAMYrLJiU1J7MstUjfLoEr43frW8aCUxoVx8/8YW5g/KrQxcjJISFgInH0x2wmCFtM4sK9 9WxdjFwcQgJLGSVerLrFAlP059smVojEdEaJ24e3QjmrmCSu7FzCClLFJmAksfXkNEYQW0RA QuJX/1Uwm1kgRuL1/h9AYzk4hAWsJc780gYxWQRUJV4dVAKp4BXwkFg88SzULgWJY1O/gk3k FPCUWLOhlx3EFgKqmfrqKthaCYHLbBKXWneBjWcREJD4NvkQC8hMCQFZiU0HmCHmSEocXHGD ZQKj8AJGhlWMoqkFyQXFSem5hnrFibnFpXnpesn5uZsYgSF4+t8zqR2MKxssDjEKcDAq8fA6 hEgFCrEmlhVX5h5ilOBgVhLhncAhHSjEm5JYWZValB9fVJqTWnyIMRlo+URmKdHkfGB85JXE GxqbmJsam1oaGZmZmpImrCTOy3jqSYCQQHpiSWp2ampBahHMFiYOTqkGRvFJ/7Jv+p7i2hYl liBltb+P2e6VqpeTyUN/69JGvSNiOoumBFZPfiryqj0v97v13V12t8Ialyzfvs1/V9/Ll/lM 2hMS/C+Gpk2MqZV9ELopqWIpr03QD+/rq79tuz7bqzyEewv3r7Kub5cqZ4a+/KDCzzrhsEuM //F+f0Ym72dX01YeCFV7rcRSnJFoqMVcVJwIAAuWQZGFAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrIIsWRmVeSWpSXmKPExsVy+t9jQd1NxtKBBpN+clq83dvJ7sDocfbO DsYAxqgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxUWyUXnwBdt8wc oLFKCmWJOaVAoYDE4mIlfTtME0JD3HQtYBojdH1DguB6jAzQQMIaxozfrW8ZC05pVBw/84e5 gfGrQhcjJ4eEgInEn2+bWCFsMYkL99azdTFycQgJTGeUuH14KyuEs4pJ4srOJWBVbAJGEltP TmMEsUUEJCR+9V8Fs5kFYiRe7/8B1M3BISxgLXHmlzaIySKgKvHqoBJIBa+Ah8TiiWdZIHYp SByb+hVsIqeAp8SaDb3sILYQUM3UV1dZJzDyLmBkWMUomlqQXFCclJ5rqFecmFtcmpeul5yf u4kRHODPpHYwrmywOMQowMGoxMPrECIVKMSaWFZcmXuIUYKDWUmEdwKHdKAQb0piZVVqUX58 UWlOavEhxmSgoyYyS4km5wOjL68k3tDYxNzU2NTSxMLEzJI0YSVxXsZTTwKEBNITS1KzU1ML UotgtjBxcEo1MFYzKDzVnLxXZ03rucbjynWXO6MezEoT4KhaUv8oavOlxFPGPWbv3ie+7uGq m52c7faQqVx2+jbhbLnHymoRPcx+hQULWyf43m8O5T/nmcFxdcbHkgtLJvZV/o7p1H/qc+jP nrf8VUor8mXWOs4pfW8dIbrn5oYpmxMrdLjlshfHnY2SmOxbp8RSnJFoqMVcVJwIAKYm8iu0 AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: patches@linaro.org Subject: [U-Boot] [PATCH 2/2 V3] SMDK5250: Add PMIC voltage settings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds required pmic voltage settings for SMDK5250. Acked-by: Simon Glass Signed-off-by: Rajeshwari Shinde --- Changes in V2: - Corrected the multi line comment style Changes in V3: - None board/samsung/smdk5250/smdk5250.c | 113 ++++++++++++++++++++++++++++++++++++- include/power/max77686_pmic.h | 32 ++++++++++ 2 files changed, 143 insertions(+), 2 deletions(-) diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 7a5f132..ffc5ee5 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -80,12 +82,119 @@ int dram_init(void) } #if defined(CONFIG_POWER) +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ + u32 val; + int ret = 0; + + ret = pmic_reg_read(p, reg, &val); + if (ret) { + debug("%s: PMIC %d register read failed\n", __func__, reg); + return -1; + } + val |= regval; + ret = pmic_reg_write(p, reg, val); + if (ret) { + debug("%s: PMIC %d register write failed\n", __func__, reg); + return -1; + } + return 0; +} + int power_init_board(void) { + struct pmic *p; + + set_ps_hold_ctrl(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (pmic_init(I2C_PMIC)) return -1; - else - return 0; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, + MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) + return -1; + + /* VDD_MIF */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_BUCK1OUT_1V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK1OUT); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, + MAX77686_BUCK1CTRL_EN)) + return -1; + + /* VDD_ARM */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK2DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_BUCK2CTRL_ON)) + return -1; + + /* VDD_INT */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK3DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_G3D */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK4DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_LDO2 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_LD02CTRL1_1_5V | EN_LDO)) + return -1; + + /* VDD_LDO3 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_LD03CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO5 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_LD05CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO10 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_LD10CTRL1_1_8V | EN_LDO)) + return -1; + + return 0; } #endif diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h index d949ace..4b1cd3c 100644 --- a/include/power/max77686_pmic.h +++ b/include/power/max77686_pmic.h @@ -155,4 +155,36 @@ enum { EN_LDO = (0x3 << 6), }; +/* Buck1 1 volt value */ +#define MAX77686_BUCK1OUT_1V 0x5 +#define MAX77686_BUCK1CTRL_EN (3 << 0) +/* Buck2 1.3 volt value */ +#define MAX77686_BUCK2DVS1_1_3V 0x38 +#define MAX77686_BUCK2CTRL_ON (1 << 4) +/* Buck3 1.0125 volt value */ +#define MAX77686_BUCK3DVS1_1_0125V 0x21 +#define MAX77686_BUCK3CTRL_ON (1 << 4) +/* Buck4 1.2 volt value */ +#define MAX77686_BUCK4DVS1_1_2V 0x30 +#define MAX77686_BUCK4CTRL_ON (1 << 4) +/* LDO2 1.5 volt value */ +#define MAX77686_LD02CTRL1_1_5V 0x1c +/* LDO3 1.8 volt value */ +#define MAX77686_LD03CTRL1_1_8V 0x14 +/* LDO5 1.8 volt value */ +#define MAX77686_LD05CTRL1_1_8V 0x14 +/* LDO10 1.8 volt value */ +#define MAX77686_LD10CTRL1_1_8V 0x14 +/* + * MAX77686_REG_PMIC_32KHZ set to 32KH CP + * output is activated + */ +#define MAX77686_32KHCP_EN (1 << 1) +/* + * MAX77686_REG_PMIC_BBAT set to + * Back up batery charger on and + * limit voltage setting to 3.5v + */ +#define MAX77686_BBCHOSTEN (1 << 0) +#define MAX77686_BBCVS_3_5V (3 << 3) #endif /* __MAX77686_PMIC_H_ */