From patchwork Wed Jan 30 21:19:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau?= X-Patchwork-Id: 216976 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0220A2C0077 for ; Thu, 31 Jan 2013 08:21:42 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 35C264A0A5; Wed, 30 Jan 2013 22:21:16 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aAMMIjWpP+0U; Wed, 30 Jan 2013 22:21:16 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 22B914A12A; Wed, 30 Jan 2013 22:20:43 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BFE594A09C for ; Wed, 30 Jan 2013 22:20:37 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aLi8g9Xd1645 for ; Wed, 30 Jan 2013 22:20:35 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 IN_IX_MANITU=4.35 (only DNSBL check requested) Received: from zose-mta12.web4all.fr (zose-mta12.web4all.fr [178.33.204.89]) by theia.denx.de (Postfix) with ESMTPS id 446244A09B for ; Wed, 30 Jan 2013 22:20:34 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zose-mta12.web4all.fr (Postfix) with ESMTP id A87E78629B; Wed, 30 Jan 2013 22:20:33 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zose-mta12.web4all.fr ([127.0.0.1]) by localhost (zose-mta12.web4all.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pcXUXQKD83zH; Wed, 30 Jan 2013 22:20:33 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zose-mta12.web4all.fr (Postfix) with ESMTP id 5511E862A9; Wed, 30 Jan 2013 22:20:33 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zose-mta12.web4all.fr ([127.0.0.1]) by localhost (zose-mta12.web4all.fr [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id nnEPHqf65xVV; Wed, 30 Jan 2013 22:20:32 +0100 (CET) Received: from advdt005-ubuntu.?none? (cie44-1-88-188-188-98.fbx.proxad.net [88.188.188.98]) by zose-mta12.web4all.fr (Postfix) with ESMTPA id BBE70862A4; Wed, 30 Jan 2013 22:20:31 +0100 (CET) From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= To: u-boot@lists.denx.de, Stefano Babic Date: Wed, 30 Jan 2013 22:19:18 +0100 Message-Id: <1359580758-20743-6-git-send-email-benoit.thebaudeau@advansee.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359580758-20743-1-git-send-email-benoit.thebaudeau@advansee.com> References: <1359580758-20743-1-git-send-email-benoit.thebaudeau@advansee.com> MIME-Version: 1.0 Cc: Fabio Estevam Subject: [U-Boot] [PATCH 6/6] imx: mx6q DDR3 init: Benefit from available CL = 7 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de All the users of mx6q_4x_mt41j128.cfg (DDR3-1333H Micron MT41J128M16HA-15E or SK hynix H5TQ2G63BFR-H9C for i.MX6Q SABRE Lite, and DDR3-1600K Micron MT41K128M16JT-125:K for i.MX6 SABRE SD) support the optional down binning to DDR3-1066F (CL = 7, CWL = 6), which is possible at 532 MHz, so use it. In these conditions: tRCD(min) = 13.125 ns tRP(min) = 13.125 ns tRC(min) = max(tRAS(min, DDR3-1333H), tRAS(min, DDR3-1600K)) + tRP(min) tRAS(min, DDR3-1333H) = 36 ns tRAS(min, DDR3-1600K) = 35 ns MMDC1_MDCFG0.tCL should be set to 7 nCK, encoded as 0x4 in the bit-field MMDC1_MDCFG0[3:0]. MR0.CL should be set as in MMDC1_MDCFG0.tCL, i.e. to 7 nCK, which is encoded as 0x6 in MRS.LMR.MR0.{A6:A4, A2} and MMDC1_MDSCR[22:20, 18]. MMDC1_MDCFG1.tCWL should be set to 6 nCK, encoded as 0x4 in the bit-field MMDC1_MDCFG1[2:0]. MMDC1_MDCFG1.tRCD should be set to 13.125 ns, which is 7 nCK at 532 MHz, encoded as 0x6 in the bit-field MMDC1_MDCFG1[31:29]. MMDC1_MDCFG1.tRP should be set to 13.125 ns, which is 7 nCK at 532 MHz, encoded as 0x6 in the bit-field MMDC1_MDCFG1[28:26]. MMDC1_MDCFG1.tRC should be set to 49.125 ns, which is 27 nCK at 532 MHz, encoded as 0x1A in the bit-field MMDC1_MDCFG1[25:21]. Signed-off-by: Benoît Thébaudeau --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index d50858d..f4cae5e 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -109,8 +109,8 @@ DATA 4 0x021b4828 0x33333333 DATA 4 0x021b0018 0x00081740 DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x555A7975 -DATA 4 0x021b0010 0xFF538F64 +DATA 4 0x021b000c 0x555A7974 +DATA 4 0x021b0010 0xDB538F64 DATA 4 0x021b0014 0x01FF00DB DATA 4 0x021b002c 0x000026D2 @@ -126,8 +126,8 @@ DATA 4 0x021b001c 0x00008033 DATA 4 0x021b001c 0x0000803B DATA 4 0x021b001c 0x00428031 DATA 4 0x021b001c 0x00428039 -DATA 4 0x021b001c 0x19408030 -DATA 4 0x021b001c 0x19408038 +DATA 4 0x021b001c 0x19308030 +DATA 4 0x021b001c 0x19308038 DATA 4 0x021b001c 0x04008040 DATA 4 0x021b001c 0x04008048