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Fri, 28 Dec 2012 21:05:29 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MFQ00MRYPFC8100@mmp2.samsung.com> for u-boot@lists.denx.de; Fri, 28 Dec 2012 21:05:29 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Fri, 28 Dec 2012 17:38:44 +0530 Message-id: <1356696525-21001-4-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1356696525-21001-1-git-send-email-rajeshwari.s@samsung.com> References: <1356696525-21001-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLLMWRmVeSWpSXmKPExsWyRsSkSper+26Awbfl/BZv93ayOzB6nL2z gzGAMYrLJiU1J7MstUjfLoEr4/u9Z6wFX+Qr3k66wtbAeFi6i5GTQ0LAROL+gvvMELaYxIV7 69m6GLk4hASWMkqs2dfGBFO0d0YPI0RiOqPEzxVnWSGcVUwSf9q+g1WxCRhJbD05jRHEFhGQ kPjVfxXMZhYokfj2rZsVxBYWsJDYOfkSC4jNIqAqsXz+L7DVvAIeEj/nPmSH2KYgcWzqV7B6 TgFPiWMPr4HNEQKq+Xp4NStEr4DEt8mHgOZwANXLSmw6wAxyj4TAZTaJv7cPMULMkZQ4uOIG ywRG4QWMDKsYRVMLkguKk9JzjfSKE3OLS/PS9ZLzczcxAsPw9L9n0jsYVzVYHGIU4GBU4uFd 1HMnQIg1say4MvcQowQHs5IIb1/z3QAh3pTEyqrUovz4otKc1OJDjD5Al0xklhJNzgfGSF5J vKGxibmpsamlkZGZqSkOYSVx3maPlAAhgfTEktTs1NSC1CKYcUwcnFINjJOZws0PJaW9Ohr+ Z9/TR7FWl7/NSI3K+f54ub/vhYcRe9fm/fmzSvfU8f+8Z440u6jcd7kcHnSGTzp/tsWx+ZrP OpR4nM696TO44LP5xR+xjfFyoSeXrdtRbynL+573ZNKph59lF5XG/b3czR5Yuz/c5FPvlfcX tb0/8m5snKM9Y09un2Gf30clluKMREMt5qLiRAA29Kf3cAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuphkeLIzCtJLcpLzFFi42I5/e+xoC5n990Ag4k3bSze7u1kd2D0OHtn B2MAY1QDo01GamJKapFCal5yfkpmXrqtkndwvHO8qZmBoa6hpYW5kkJeYm6qrZKLT4CuW2YO 0FglhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8b3e89YC77IV7yddIWt gfGwdBcjJ4eEgInE3hk9jBC2mMSFe+vZuhi5OIQEpjNK/FxxlhXCWcUk8aftOxNIFZuAkcTW k9PAOkQEJCR+9V8Fs5kFSiS+fetmBbGFBSwkdk6+xAJiswioSiyf/4sZxOYV8JD4OfchO8Q2 BYljU7+C1XMKeEoce3gNbI4QUM3Xw6tZJzDyLmBkWMUomlqQXFCclJ5rpFecmFtcmpeul5yf u4kRHOTPpHcwrmqwOMQowMGoxMO7qOdOgBBrYllxZe4hRgkOZiUR3r7muwFCvCmJlVWpRfnx RaU5qcWHGH2ArprILCWanA+MwLySeENjE3NTY1NLEwsTM0scwkrivM0eKQFCAumJJanZqakF qUUw45g4OKUaGEUjlTLlltef6ny62aGk+/X7s1dYW2S5ZbP057znZI+6GmZ18dOVfw2CF23l ImL/Kv1azejO9WJbWurpT4dvzs30+fKsu3VXtuOE2P8Mk8SZtKtKitRXtgfuOSV0UlB8mtDd RdnysUVd3rM671nnpyntSr26+cgpFslVS0za/ihPUvVh02lXU2Ipzkg01GIuKk4EAMt1vPmf AgAA X-CFilter-Loop: Reflected Cc: patches@linaro.org Subject: [U-Boot] [PATCH 3/4] SMDK5250: Add PMIC voltage settings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds required pmic voltage settings for SMDK5250. Signed-off-by: Rajeshwari Shinde --- board/samsung/smdk5250/smdk5250.c | 68 +++++++++++++++++++++++++++++++++++- include/power/max77686_pmic.h | 15 ++++++++ 2 files changed, 81 insertions(+), 2 deletions(-) diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 73c3ec0..fe353a1 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -24,14 +24,17 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -60,10 +63,71 @@ int dram_init(void) #if defined(CONFIG_POWER) int power_init_board(void) { + struct pmic *p; + u32 val; + + ps_hold_setup(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (pmic_init(I2C_PMIC)) return -1; - else - return 0; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + pmic_reg_read(p, MAX77686_REG_PMIC_32KHZ, &val); + val |= MAX77686_32KHCP_EN; + pmic_reg_write(p, MAX77686_REG_PMIC_32KHZ, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_BBAT, &val); + val |= (MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V); + pmic_reg_write(p, MAX77686_REG_PMIC_BBAT, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, MAX77686_BUCK1OUT_1V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK1CRTL, &val); + val |= MAX77686_BUCK1CTRL_EN; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1CRTL, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK2CTRL1, &val); + val |= MAX77686_BUCK2CTRL_ON; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2CTRL1, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK3CTRL, &val); + val |= MAX77686_BUCK3CTRL_ON; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3CTRL, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK4CTRL1, &val); + val |= MAX77686_BUCK4CTRL_ON; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO2CTRL1, &val); + val |= (MAX77686_LD02CTRL1_1_5V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO2CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO3CTRL1, &val); + val |= (MAX77686_LD03CTRL1_1_8V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO3CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO5CTRL1, &val); + val |= (MAX77686_LD05CTRL1_1_8V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO5CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO10CTRL1, &val); + val |= (MAX77686_LD10CTRL1_1_8V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO10CTRL1, val); + + return 0; } #endif diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h index d949ace..fb3a8fb 100644 --- a/include/power/max77686_pmic.h +++ b/include/power/max77686_pmic.h @@ -155,4 +155,19 @@ enum { EN_LDO = (0x3 << 6), }; +#define MAX77686_BUCK1OUT_1V 0x5 +#define MAX77686_BUCK1CTRL_EN (3<<0) +#define MAX77686_BUCK2DVS1_1_3V 0x38 +#define MAX77686_BUCK2CTRL_ON (1<<4) +#define MAX77686_BUCK3DVS1_1_0125V 0x21 +#define MAX77686_BUCK3CTRL_ON (1<<4) +#define MAX77686_BUCK4DVS1_1_2V 0x30 +#define MAX77686_BUCK4CTRL_ON (1<<4) +#define MAX77686_LD02CTRL1_1_5V 0x1c +#define MAX77686_LD03CTRL1_1_8V 0x14 +#define MAX77686_LD05CTRL1_1_8V 0x14 +#define MAX77686_LD10CTRL1_1_8V 0x14 +#define MAX77686_32KHCP_EN (1<<1) +#define MAX77686_BBCHOSTEN (1<<0) +#define MAX77686_BBCVS_3_5V (3<<3) #endif /* __MAX77686_PMIC_H_ */