From patchwork Tue Oct 2 12:57:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 188502 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D03EF2C00EE for ; Tue, 2 Oct 2012 22:58:35 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D265D280CE; Tue, 2 Oct 2012 14:58:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1tINqPFEoCtk; Tue, 2 Oct 2012 14:58:20 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5E084280EB; Tue, 2 Oct 2012 14:58:06 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A86A6280D1 for ; Tue, 2 Oct 2012 14:57:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7u7MXVfWw9L0 for ; Tue, 2 Oct 2012 14:57:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f44.google.com (mail-pa0-f44.google.com [209.85.220.44]) by theia.denx.de (Postfix) with ESMTPS id 3A4E2280CA for ; Tue, 2 Oct 2012 14:57:49 +0200 (CEST) Received: by padfb11 with SMTP id fb11so5323079pad.3 for ; Tue, 02 Oct 2012 05:57:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=3lx+ibKE8EmH4yHHT1ZtdRSD0G93OB7RI7UPWhp4HKU=; b=E8O+AUTUMJqJ6ycxFHXxdSl/zjiVOky8BLw3PNIkYy33OckX6pcnk6eMQWemdLLlox FwF+1Bu65aCQ8NXXP5mRZebXTAIjlOYvqjXLANDoTuDcZAwxDxh+ELr05F1RpCzfdKZD UbKjz08O4frFrZ8+lsr2jKZBsQWgQQjCld7K71XGT3gLsq8t1pJESC23Mn3LtknTxiCy RmSEIXbjZE7DPgo4SVBv3f7EePZ3SXVxJmL93WLLNKIr4/pDJd/4tJtOwMkLcQcfhdo2 wwGTKoBnHut2RktNoYh6Efhfce1G9CD2zGNtiTq5zKyM+yfFgGmK1z9WfmLMbTUbPO0J qN+Q== Received: by 10.66.79.69 with SMTP id h5mr33742727pax.12.1349182666755; Tue, 02 Oct 2012 05:57:46 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id m5sm697795pax.10.2012.10.02.05.57.44 (version=SSLv3 cipher=OTHER); Tue, 02 Oct 2012 05:57:46 -0700 (PDT) From: Chander Kashyap To: u-boot@lists.denx.de Date: Tue, 2 Oct 2012 18:27:26 +0530 Message-Id: <1349182648-9422-2-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1349182648-9422-1-git-send-email-chander.kashyap@linaro.org> References: <1349182648-9422-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQn9touhyr+0LtvOc5CuisgfxQ0kSRJJQ0jy3lxxatAPM5DVHAmzBhmt9WQ8B8ZVwycYL+zx Cc: linaro-dev@lists.linaro.org, patches@linaro.org Subject: [U-Boot] [PATCH 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch populates base addresses of Exynos4x12 registers. Signed-off-by: Chander Kashyap --- arch/arm/include/asm/arch-exynos/cpu.h | 48 +++++++++++++++++++++++++++----- 1 file changed, 41 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 2bde10c..680b93b 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -27,7 +27,7 @@ #define EXYNOS_CPU_NAME "Exynos" #define EXYNOS4_ADDR_BASE 0x10000000 -/* EXYNOS4 */ +/* EXYNOS4 Common*/ #define EXYNOS4_GPIO_PART3_BASE 0x03860000 #define EXYNOS4_PRO_ID 0x10000000 #define EXYNOS4_SYSREG_BASE 0x10010000 @@ -58,7 +58,37 @@ #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE -/* EXYNOS5 */ +/* EXYNOS4X12 */ +#define EXYNOS4X12_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4X12_PRO_ID 0x10000000 +#define EXYNOS4X12_SYSREG_BASE 0x10010000 +#define EXYNOS4X12_POWER_BASE 0x10020000 +#define EXYNOS4X12_SWRESET 0x10020400 +#define EXYNOS4X12_USBPHY_CONTROL 0x10020704 +#define EXYNOS4X12_CLOCK_BASE 0x10030000 +#define EXYNOS4X12_SYSTIMER_BASE 0x10050000 +#define EXYNOS4X12_WATCHDOG_BASE 0x10060000 +#define EXYNOS4X12_DMC0_BASE 0x10600000 +#define EXYNOS4X12_DMC1_BASE 0x10610000 +#define EXYNOS4X12_GPIO_PART4_BASE 0x106E0000 +#define EXYNOS4X12_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4X12_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4X12_FIMD_BASE 0x11C00000 +#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C80000 +#define EXYNOS4X12_USBOTG_BASE 0x12480000 +#define EXYNOS4X12_MMC_BASE 0x12510000 +#define EXYNOS4X12_SROMC_BASE 0x12570000 +#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x12580000 +#define EXYNOS4X12_USBPHY_BASE 0x125B0000 +#define EXYNOS4X12_UART_BASE 0x13800000 +#define EXYNOS4X12_I2C_BASE 0x13860000 +#define EXYNOS4X12_PWMTIMER_BASE 0x139D0000 + +#define EXYNOS4X12_ADC_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE + +/* EXYNOS5 Common*/ #define EXYNOS5_I2C_SPACING 0x10000 #define EXYNOS5_GPIO_PART4_BASE 0x03860000 @@ -146,17 +176,21 @@ static inline int proid_is_##type(void) \ } IS_EXYNOS_TYPE(exynos4210, 0x4210) +IS_EXYNOS_TYPE(exynos4412, 0x4412) IS_EXYNOS_TYPE(exynos5250, 0x5250) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_exynos4()) \ - return EXYNOS4_##base; \ - else if (cpu_is_exynos5()) \ + if (cpu_is_exynos4()) { \ + if (proid_is_exynos4412()) \ + return EXYNOS4X12_##base; \ + else \ + return EXYNOS4_##base; \ + } else if (cpu_is_exynos5()) { \ return EXYNOS5_##base; \ - else \ - return 0; \ + } \ + return 0; \ } SAMSUNG_BASE(adc, ADC_BASE)