From patchwork Mon Oct 1 14:06:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 188299 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B3DF52C0110 for ; Tue, 2 Oct 2012 00:07:29 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 08B4528083; Mon, 1 Oct 2012 16:07:25 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zjndppq027NB; Mon, 1 Oct 2012 16:07:24 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 41C1F28086; Mon, 1 Oct 2012 16:07:05 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8BC1F2807E for ; Mon, 1 Oct 2012 16:07:01 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id W074YHjTJHJb for ; Mon, 1 Oct 2012 16:07:00 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from va3outboundpool.messaging.microsoft.com (va3ehsobe002.messaging.microsoft.com [216.32.180.12]) by theia.denx.de (Postfix) with ESMTPS id 8002A2807B for ; Mon, 1 Oct 2012 16:06:57 +0200 (CEST) Received: from mail243-va3-R.bigfish.com (10.7.14.245) by VA3EHSOBE011.bigfish.com (10.7.40.61) with Microsoft SMTP Server id 14.1.225.23; Mon, 1 Oct 2012 14:06:56 +0000 Received: from mail243-va3 (localhost [127.0.0.1]) by mail243-va3-R.bigfish.com (Postfix) with ESMTP id 5207A4800F2 for ; Mon, 1 Oct 2012 14:06:56 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah107ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1155h) Received: from mail243-va3 (localhost.localdomain [127.0.0.1]) by mail243-va3 (MessageSwitch) id 134910041416600_13700; Mon, 1 Oct 2012 14:06:54 +0000 (UTC) Received: from VA3EHSMHS029.bigfish.com (unknown [10.7.14.242]) by mail243-va3.bigfish.com (Postfix) with ESMTP id EA05546004F for ; Mon, 1 Oct 2012 14:06:53 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS029.bigfish.com (10.7.99.39) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 1 Oct 2012 14:06:51 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.309.3; Mon, 1 Oct 2012 09:06:51 -0500 Received: from efes.am.freescale.net (efes.am.freescale.net [10.82.123.3]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q91E6hX2027597; Mon, 1 Oct 2012 07:06:50 -0700 From: Timur Tabi To: Andy Fleming , Date: Mon, 1 Oct 2012 09:06:42 -0500 Message-ID: <1349100403-10728-5-git-send-email-timur@freescale.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1349100403-10728-1-git-send-email-timur@freescale.com> References: <1349100403-10728-1-git-send-email-timur@freescale.com> Organization: Freescale Semiconductor MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH 5/6] powerpc/p5040ds: add per pci endpoint liodn offset list X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Laurentiu Tudor Add a new device tree property named "fsl,liodn-offset-list" holding a list of per pci endpoint permitted liodn offsets. This property is useful in virtualization scenarios that implement per pci endpoint partitioning. The final liodn of a partitioned pci endpoint is calculated by the hardware, by adding these offsets to pci controller's base liodn, stored in the "fsl,liodn" property of its node. The liodn offsets are interleaved to get better cache utilization. As an example, given 3 pci controllers, the following liodns are generated for the pci endpoints: pci0: 193 256 259 262 265 268 271 274 277 pci1: 194 257 260 263 266 269 272 275 278 pci2: 195 258 261 264 267 270 273 276 279 Signed-off-by: Laurentiu Tudor --- arch/powerpc/cpu/mpc85xx/liodn.c | 52 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 52 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index 11881c9..97d6904 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -248,6 +248,56 @@ static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl) } } +#define CONFIG_SYS_MAX_PCI_EPS 8 +#define CONFIG_SYS_PCI_EP_LIODN_START 256 + +static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat) +{ + int off, pci_idx = 0, pci_cnt = 0, i, rc; + const uint32_t *base_liodn; + uint32_t liodn_offs[CONFIG_SYS_MAX_PCI_EPS + 1] = { 0 }; + + /* + * Count the number of pci nodes. + * It's needed later when the interleaved liodn offsets are generated. + */ + off = fdt_node_offset_by_compatible(fdt, -1, compat); + while (off != -FDT_ERR_NOTFOUND) { + pci_cnt++; + off = fdt_node_offset_by_compatible(fdt, off, compat); + } + + for (off = fdt_node_offset_by_compatible(fdt, -1, compat); + off != -FDT_ERR_NOTFOUND; + off = fdt_node_offset_by_compatible(fdt, off, compat)) { + base_liodn = fdt_getprop(fdt, off, "fsl,liodn", &rc); + if (!base_liodn) { + char path[64]; + + if (fdt_get_path(fdt, off, path, sizeof(path)) < 0) + strcpy(path, "(unknown)"); + printf("WARNING Could not get liodn of node %s: %s\n", + path, fdt_strerror(rc)); + continue; + } + for (i = 0; i < CONFIG_SYS_MAX_PCI_EPS; i++) + liodn_offs[i + 1] = CONFIG_SYS_PCI_EP_LIODN_START + + i * pci_cnt + pci_idx - *base_liodn; + rc = fdt_setprop(fdt, off, "fsl,liodn-offset-list", + liodn_offs, sizeof(liodn_offs)); + if (rc) { + char path[64]; + + if (fdt_get_path(fdt, off, path, sizeof(path)) < 0) + strcpy(path, "(unknown)"); + printf("WARNING Unable to set fsl,liodn-offset-list for " + "node %s: %s\n", path, fdt_strerror(rc)); + continue; + } + pci_idx++; + } +} + static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz) { int i; @@ -295,4 +345,6 @@ void fdt_fixup_liodn(void *blob) #ifdef CONFIG_SYS_DPAA_RMAN fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz); #endif + + fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie-v2.4"); }