From patchwork Mon Sep 17 21:12:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 184544 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0175A2C0086 for ; Tue, 18 Sep 2012 07:13:01 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA25E2815C; Mon, 17 Sep 2012 23:12:57 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3FvIexjbQ60d; Mon, 17 Sep 2012 23:12:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7CA3428136; Mon, 17 Sep 2012 23:12:54 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 240D828136 for ; Mon, 17 Sep 2012 23:12:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6xi4CLx89qEZ for ; Mon, 17 Sep 2012 23:12:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe002.messaging.microsoft.com [216.32.181.182]) by theia.denx.de (Postfix) with ESMTPS id 106792812E for ; Mon, 17 Sep 2012 23:12:49 +0200 (CEST) Received: from mail102-ch1-R.bigfish.com (10.43.68.250) by CH1EHSOBE016.bigfish.com (10.43.70.66) with Microsoft SMTP Server id 14.1.225.23; Mon, 17 Sep 2012 21:12:47 +0000 Received: from mail102-ch1 (localhost [127.0.0.1]) by mail102-ch1-R.bigfish.com (Postfix) with ESMTP id AE7BB80108; Mon, 17 Sep 2012 21:12:47 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 1 X-BigFish: VS1(zzd6f1izz1202h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah107ah1288h12a5h12a9h12bdh12e5h1155h) Received: from mail102-ch1 (localhost.localdomain [127.0.0.1]) by mail102-ch1 (MessageSwitch) id 1347916365456624_31833; Mon, 17 Sep 2012 21:12:45 +0000 (UTC) Received: from CH1EHSMHS002.bigfish.com (snatpool2.int.messaging.microsoft.com [10.43.68.234]) by mail102-ch1.bigfish.com (Postfix) with ESMTP id 6157C1A004D; Mon, 17 Sep 2012 21:12:45 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS002.bigfish.com (10.43.70.2) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 17 Sep 2012 21:12:45 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.2.309.3; Mon, 17 Sep 2012 16:12:44 -0500 Received: from efes.am.freescale.net (efes.am.freescale.net [10.82.123.3]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q8HLCgc0022923; Mon, 17 Sep 2012 14:12:43 -0700 From: Timur Tabi To: Anatolij Gustschin , Date: Mon, 17 Sep 2012 16:12:42 -0500 Message-ID: <1347916362-26283-1-git-send-email-timur@freescale.com> X-Mailer: git-send-email 1.7.3.4 Organization: Freescale Semiconductor MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH] video/powerpc: don't touch DIU registers that we don't need X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Several DIU registers were being initialized either unnecessarily or to wrong values. 1) All interrupts were enabled even though there's no interrupt handler. Interrupts were left enabled when booting Linux. 2) Don't configure a dummy area descriptor, since we don't support ADs in U-Boot. 3) Don't configure any write-back buffer registers, since we don't use that mode. 4) The default values for the THRESHOLDS, SYN_POL, and PLUT registers should be used, so don't touch those registers either. Signed-off-by: Timur Tabi --- drivers/video/fsl_diu_fb.c | 21 ++------------------- 1 files changed, 2 insertions(+), 19 deletions(-) diff --git a/drivers/video/fsl_diu_fb.c b/drivers/video/fsl_diu_fb.c index 648ffa3..a98cb67 100644 --- a/drivers/video/fsl_diu_fb.c +++ b/drivers/video/fsl_diu_fb.c @@ -271,7 +271,6 @@ int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR; u8 *gamma_table_base; unsigned int i, j; - struct diu_ad *dummy_ad; struct diu_addr gamma; struct diu_addr cursor; @@ -302,14 +301,6 @@ int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) return -1; } - /* The AD struct for the dummy framebuffer and the FB itself */ - dummy_ad = allocate_fb(2, 4, 4, NULL); - if (!dummy_ad) { - printf("DIU: Out of memory\n"); - return -1; - } - dummy_ad->pix_fmt = 0x88883316; - /* read mode info */ info.var.xres = fsl_diu_mode_db->xres; info.var.yres = fsl_diu_mode_db->yres; @@ -376,10 +367,7 @@ int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) out_be32(&hw->gamma, gamma.paddr); out_be32(&hw->cursor, cursor.paddr); out_be32(&hw->bgnd, 0x007F7F7F); - out_be32(&hw->bgnd_wb, 0); out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres); - out_be32(&hw->wb_size, 0); - out_be32(&hw->wb_mem_addr, 0); out_be32(&hw->hsyn_para, info.var.left_margin << 22 | info.var.hsync_len << 11 | info.var.right_margin); @@ -388,18 +376,13 @@ int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) info.var.vsync_len << 11 | info.var.lower_margin); - out_be32(&hw->syn_pol, 0); - out_be32(&hw->thresholds, 0x00037800); - out_be32(&hw->int_status, 0); - out_be32(&hw->int_mask, 0); - out_be32(&hw->plut, 0x01F5F666); /* Pixel Clock configuration */ diu_set_pixel_clock(info.var.pixclock); /* Set the frame buffers */ out_be32(&hw->desc[0], virt_to_phys(ad)); - out_be32(&hw->desc[1], virt_to_phys(dummy_ad)); - out_be32(&hw->desc[2], virt_to_phys(dummy_ad)); + out_be32(&hw->desc[1], 0); + out_be32(&hw->desc[2], 0); /* Enable the DIU, set display to all three planes */ out_be32(&hw->diu_mode, 1);