From patchwork Mon Jul 2 11:36:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 168568 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 04CD72C0086 for ; Mon, 2 Jul 2012 21:33:30 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 760D3280C9; Mon, 2 Jul 2012 13:33:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xqV2Ra4dzYiV; Mon, 2 Jul 2012 13:33:27 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 106DE280AA; Mon, 2 Jul 2012 13:33:18 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 267DD2809E for ; Mon, 2 Jul 2012 13:33:10 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HCOjN000pCx6 for ; Mon, 2 Jul 2012 13:33:08 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) by theia.denx.de (Postfix) with ESMTP id 374C22809A for ; Mon, 2 Jul 2012 13:33:06 +0200 (CEST) Received: from epcpsbgm2.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M6J00EW26PTHXO0@mailout1.samsung.com> for u-boot@lists.denx.de; Mon, 02 Jul 2012 20:33:04 +0900 (KST) X-AuditID: cbfee61b-b7f776d000002f3f-9f-4ff186f0a6c8 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id B8.83.12095.0F681FF4; Mon, 02 Jul 2012 20:33:04 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M6J00MOX6QL8K70@mmp2.samsung.com> for u-boot@lists.denx.de; Mon, 02 Jul 2012 20:33:04 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Mon, 02 Jul 2012 17:06:36 +0530 Message-id: <1341229005-19008-2-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1341229005-19008-1-git-send-email-rajeshwari.s@samsung.com> References: <1341229005-19008-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCJMWRmVeSWpSXmKPExsVy+t9jQd0PbR/9Dfq3qVq83dvJ7sDocfbO DsYAxigum5TUnMyy1CJ9uwSujOObnrMV3FGuWPBwK2MD41qZLkZODgkBE4nFn1qZIWwxiQv3 1rN1MXJxCAlMZ5SYdeEeM4Szikni2Y6dTCBVbAJGEltPTmMEsUUEJCR+9V9lBCliFljBKDGn ZxsLSEJYwFVi09QrYDaLgKrE6+kTWEFsXgEPibbvF5kg1ilIHJv6FSzOKeApMePyZDBbCKjm VtcB5gmMvAsYGVYxiqYWJBcUJ6XnGukVJ+YWl+al6yXn525iBPv9mfQOxlUNFocYBTgYlXh4 /9V/9BdiTSwrrsw9xCjBwawkwrshASjEm5JYWZValB9fVJqTWnyIUZqDRUmct8n6gr+QQHpi SWp2ampBahFMlomDU6qB0f7LpiD9H6uObYxuV33Ns+H+i3mf7x1IdAx4nH2WV0Snb6rZ6ZL1 805E3ZvFr695Qq3hiNGh2X1W99nsVJn85e7UXGW9+bXhz4yeN8tnfrxkuHBxwBP3j5ZNf3Wv Trkiu+rXLf7f0d8uh38rFPp9s9cvYn7MJsZJWr9sMxYxvtFoPNtgKe9hV6nEUpyRaKjFXFSc CACSiozF9wEAAA== X-TM-AS-MML: No Cc: jy0922.shim@samsung.com, patches@linaro.org, jh80.chung@samsung.com, alim.akhtar@samsung.com Subject: [U-Boot] [PATCH 01/10 V5] ARCH: SPL: Add parametric board initializer X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add a structure for table-driven configuration mechanism such that no recompilation is needed to update the configuration parameters, rather than hard-coding board initialization parameters. Signed-off-by: Che-Liang Chiou Signed-off-by: Abhilash Kesavan Signed-off-by: Tom Wai-Hong Tam Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde --- Changes in V2: - Included Paramateric structure with in #ifndef __ASSEMBLY__. Changes in V3: - None Changes in V4: - None Changes in V5: - None arch/arm/include/asm/arch-exynos/spl.h | 97 ++++++++++++++++++++++++++++++++ 1 files changed, 97 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/spl.h diff --git a/arch/arm/include/asm/arch-exynos/spl.h b/arch/arm/include/asm/arch-exynos/spl.h new file mode 100644 index 0000000..306b41d --- /dev/null +++ b/arch/arm/include/asm/arch-exynos/spl.h @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_EXYNOS_SPL_H__ +#define __ASM_ARCH_EXYNOS_SPL_H__ + +#include + +enum boot_mode { + /* + * Assign the OM pin values for respective boot modes. + * Exynos4 does not support spi boot and the mmc boot OM + * pin values are the same across Exynos4 and Exynos5. + */ + BOOT_MODE_MMC = 4, + BOOT_MODE_SERIAL = 20, + /* Boot based on Operating Mode pin settings */ + BOOT_MODE_OM = 32, + BOOT_MODE_USB, /* Boot using USB download */ +}; + +#ifndef __ASSEMBLY__ +/* Parameters of early board initialization in SPL */ +struct spl_machine_param { + /* Add fields as and when required */ + u32 signature; + u32 version; /* Version number */ + u32 size; /* Size of block */ + /** + * Parameters we expect, in order, terminated with \0. Each parameter + * is a single character representing one 32-bit word in this + * structure. + * + * Valid characters in this string are: + * + * Code Name + * v mem_iv_size + * m mem_type + * u uboot_size + * b boot_source + * f frequency_mhz (memory frequency in MHz) + * a ARM clock frequency in MHz + * s serial base address + * i i2c base address for early access (meant for PMIC) + * r board rev GPIO numbers used to read board revision + * (lower halfword=bit 0, upper=bit 1) + * M Memory Manufacturer name + * \0 termination + */ + char params[12]; /* Length must be word-aligned */ + u32 mem_iv_size; /* Memory channel interleaving size */ + enum ddr_mode mem_type; /* Type of on-board memory */ + /* + * U-boot size - The iROM mmc copy function used by the SPL takes a + * block count paramter to describe the u-boot size unlike the spi + * boot copy function which just uses the u-boot size directly. Align + * the u-boot size to block size (512 bytes) when populating the SPL + * table only for mmc boot. + */ + u32 uboot_size; + enum boot_mode boot_source; /* Boot device */ + enum mem_manuf mem_manuf; /* Memory Manufacturer */ + unsigned frequency_mhz; /* Frequency of memory in MHz */ + unsigned arm_freq_mhz; /* ARM Frequency in MHz */ + u32 serial_base; /* Serial base address */ + u32 i2c_base; /* i2c base address */ +} __attribute__((__packed__)); +#endif + +/** + * Validate signature and return a pointer to the parameter table. If the + * signature is invalid, call panic() and never return. + * + * @return pointer to the parameter table if signature matched or never return. + */ +struct spl_machine_param *spl_get_machine_params(void); + +#endif /* __ASM_ARCH_EXYNOS_SPL_H__ */