From patchwork Fri Jun 22 04:12:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Troy Kisky X-Patchwork-Id: 166476 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9C988B6FA4 for ; Fri, 22 Jun 2012 14:13:18 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5A4FD28095; Fri, 22 Jun 2012 06:13:01 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Jq+ToU8kdl4n; Fri, 22 Jun 2012 06:13:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3CA172809D; Fri, 22 Jun 2012 06:12:37 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A663E28096 for ; Fri, 22 Jun 2012 06:12:30 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id m8qbPycbJWZm for ; Fri, 22 Jun 2012 06:12:30 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id D115628087 for ; Fri, 22 Jun 2012 06:12:26 +0200 (CEST) Received: by pbcwy7 with SMTP id wy7so2919106pbc.3 for ; Thu, 21 Jun 2012 21:12:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=oNjaGetZ/miPJvHb2plsueM/7hdyRvs+wRryXWuNgwI=; b=im1BXGtuLiLwNxfTxeDV/EJjqcPT8ugVC9Kdi7KhMcW2Rp4d0/X8ArFCkGgRRTQUQ4 +3cxr+GgBbv1mLUOaxHYTWVqvDN+6qeLGWfOoqWyurYlhLs++QrPjXJ4/7yPBalB3FnO rcpRF4qF0581reYVpvgI5lWAafMXahO8yMuSD4jF34sRUjzNC9832VzVAxvbsw/DQwp2 g5/kvXidtYJ6UHoko293MbPe8GHC4mXjmgQXlQTG1EGMlETn6IF/EGk8RWmyYB2fUrM+ r+9TqW21rCKhOAdE3jJw/K/KVLdNM2D4qsdI8VWVCGBhiitnj4ens6ugpSrCDcbNiIJF JqLA== Received: by 10.68.130.67 with SMTP id oc3mr6004968pbb.18.1340338344701; Thu, 21 Jun 2012 21:12:24 -0700 (PDT) Received: from officeserver-2 ([70.96.116.236]) by mx.google.com with ESMTPS id hf5sm30044686pbc.4.2012.06.21.21.12.23 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 21 Jun 2012 21:12:24 -0700 (PDT) Received: from tkisky by officeserver-2 with local (Exim 4.76) (envelope-from ) id 1ShvEM-00032n-2x; Thu, 21 Jun 2012 21:12:22 -0700 From: Troy Kisky To: hs@denx.de, sbabic@denx.de Date: Thu, 21 Jun 2012 21:12:07 -0700 Message-Id: <1340338339-11626-12-git-send-email-troy.kisky@boundarydevices.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1340338339-11626-1-git-send-email-troy.kisky@boundarydevices.com> References: <1340338339-11626-1-git-send-email-troy.kisky@boundarydevices.com> X-Gm-Message-State: ALoCoQnFqnVlDnYiHwil5nwvVJj+KJ/r08OMeZeXG5tOW1rQgUtMdLFoMCdwEnFZuBuUm3civPHq Cc: u-boot@lists.denx.de, r49496@freescale.com, jason.hui@linaro.org Subject: [U-Boot] [PATCH 12/24] mxc_i2c: change slave addr if conflicts with destination. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The i2c controller cannot be both master and slave in the same transaction. Signed-off-by: Troy Kisky --- drivers/i2c/mxc_i2c.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index e433312..2bff2b8 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -218,6 +218,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs, /* Wait for controller to be stable */ udelay(50); } + if (readb(&i2c_regs->iadr) == (chip << 1)) + writeb((chip << 1) ^ 2, &i2c_regs->iadr); writeb(0, &i2c_regs->i2sr); ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE); if (ret < 0)