From patchwork Wed Jun 20 22:14:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 166154 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 068BFB6FA4 for ; Thu, 21 Jun 2012 08:15:02 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1A481280C8; Thu, 21 Jun 2012 00:14:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8fFAA4lIvC2v; Thu, 21 Jun 2012 00:14:54 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B2D5B280B2; Thu, 21 Jun 2012 00:14:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1B65C2808C for ; Thu, 21 Jun 2012 00:14:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9Mu1dlgD4X4A for ; Thu, 21 Jun 2012 00:14:38 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pz0-f44.google.com (mail-pz0-f44.google.com [209.85.210.44]) by theia.denx.de (Postfix) with ESMTPS id 5751528093 for ; Thu, 21 Jun 2012 00:14:36 +0200 (CEST) Received: by dacx6 with SMTP id x6so9877477dac.3 for ; Wed, 20 Jun 2012 15:14:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=VLBlP5UQ3J6brs5exNN8v7XI8Ep1uqYrIyY2soMILak=; b=DIwa/JSHwJ+F3MBhxRN4gQCzLdwqOQegzdqir/mmlYLnoZEaHMX3cwZ2O1kwRPdFHV EJkUNrTej+moIjqNrmpvk7dxHsK6NvIGxwng7Kns4aVFiemTgb46tG/nwkyNKFrgIzOB lCtIUKWQwFCFt4dGiNICur4EXTybEt5b3Ho5uwrfMUyf3XoNVMCF9kxT/4v4yn+UZl/L bQybpp5Y+gCdGEVJJubMWBqo2z49rsJq57v8DQ0u/+jlaxwP5ULDHkpUX4+2/WU4Xbl2 0eMr52d6nKQd1zDHi5FOmDX3CwPmNPqIeRa+zH8zQTO2ZTav3fyTxa83awhajHPGY6eC McTQ== Received: by 10.68.200.102 with SMTP id jr6mr81639652pbc.0.1340230474497; Wed, 20 Jun 2012 15:14:34 -0700 (PDT) Received: from bill-the-cat.ph.cox.net (ip68-230-54-74.ph.ph.cox.net. [68.230.54.74]) by mx.google.com with ESMTPS id pq5sm4774104pbb.30.2012.06.20.15.14.33 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 20 Jun 2012 15:14:33 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Wed, 20 Jun 2012 15:14:25 -0700 Message-Id: <1340230468-12811-4-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1340230468-12811-1-git-send-email-trini@ti.com> References: <1340209283-3404-1-git-send-email-trini@ti.com> <1340230468-12811-1-git-send-email-trini@ti.com> Cc: Ilya Yanok Subject: [U-Boot] [PATCH v4 3/6] mcx: Disable DCACHE since USB EHCI is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de USB EHCI and DCACHE are not compatible, so disable DCACHE support at build-time as run-time disable is insufficient for USB use. Cc: Ilya Yanok Signed-off-by: Tom Rini --- include/configs/mcx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mcx.h b/include/configs/mcx.h index f6a83a8..0b29b08 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -110,9 +110,9 @@ #define CONFIG_OMAP3_GPIO_5 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP +#define CONFIG_SYS_DCACHE_OFF /* USB_EHCI is unusable with DCACHE support */ #define CONFIG_USB_ULPI #define CONFIG_USB_ULPI_VIEWPORT_OMAP -/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 154 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 152 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3