From patchwork Wed Jun 20 10:40:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 165998 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 184C9B6FD5 for ; Wed, 20 Jun 2012 20:37:40 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 38587280E9; Wed, 20 Jun 2012 12:37:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PpDx-AzF8-ft; Wed, 20 Jun 2012 12:37:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 17525280ED; Wed, 20 Jun 2012 12:36:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5BEAC280C9 for ; Wed, 20 Jun 2012 12:36:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id egUhFznkjqkb for ; Wed, 20 Jun 2012 12:36:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) by theia.denx.de (Postfix) with ESMTP id 423CC280C0 for ; Wed, 20 Jun 2012 12:36:46 +0200 (CEST) Received: from epcpsbgm2.samsung.com (mailout2.samsung.com [203.254.224.25]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M5W00KP1W4UYS30@mailout2.samsung.com> for u-boot@lists.denx.de; Wed, 20 Jun 2012 19:36:45 +0900 (KST) X-AuditID: cbfee61b-b7fcc6d000003a7a-af-4fe1a7bd66b5 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id CC.C2.14970.DB7A1EF4; Wed, 20 Jun 2012 19:36:45 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M5W00HP6W2XTK70@mmp1.samsung.com> for u-boot@lists.denx.de; Wed, 20 Jun 2012 19:36:45 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Wed, 20 Jun 2012 16:10:09 +0530 Message-id: <1340188810-18871-9-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1340188810-18871-1-git-send-email-rajeshwari.s@samsung.com> References: <1340188810-18871-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMJMWRmVeSWpSXmKPExsVy+t9jAd29yx/6G7y7IWjxdm8nuwOjx9k7 OxgDGKO4bFJSczLLUov07RK4Mv40/mEtmMZfsa3lF2MD41/uLkZODgkBE4nrXz6xQNhiEhfu rWfrYuTiEBJYxCjRu3oJK0hCSGAVk0TnplQQm03ASGLryWmMILaIgITEr/6rjCANzAILGSUm zLzJDJIQFgiQOPT2P1gRi4CqxLQ3b5lAbF4BD4n5j+ayQ2xTkDg29SvYAk4BT4lpZ3axQCzz kHh+/hL7BEbeBYwMqxhFUwuSC4qT0nON9IoTc4tL89L1kvNzNzGCvf5MegfjqgaLQ4wCHIxK PLwn5jz0F2JNLCuuzD3EKMHBrCTCW94BFOJNSaysSi3Kjy8qzUktPsQozcGiJM7bZH3BX0gg PbEkNTs1tSC1CCbLxMEp1cC4Lm2539GgxxWf3RzOXkyoFz21fevdjOr1KxnMZjy85T/RamWJ 6LOa7C9z9x+8scbE0+Eyi99uf3N2KcdnwgJ5l44WnbKy2H3+6XNzdfUMsQ+Bn8/+WD/DUOJO 7AXWaX/Orqs7udNjW5P596Q5x8ReZtxX809dZj3DOlmaMXjn1kNTD2qfnPx4mxJLcUaioRZz UXEiAEycuSj2AQAA X-TM-AS-MML: No Cc: banajit.g@samsung.com, patches@linaro.org, alim.akhtar@samsung.com Subject: [U-Boot] [PATCH 8/9] EXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch modifies the pinmux settings of MMC and UART as per Exynos5250 Rev 1.0 Signed-off-by: Rajeshwari Shinde --- arch/arm/cpu/armv7/exynos/pinmux.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index d2b7d2c..7611c7a 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -40,8 +40,8 @@ static void exynos5_uart_config(int peripheral) count = 4; break; case PERIPH_ID_UART1: - bank = &gpio1->a0; - start = 4; + bank = &gpio1->d0; + start = 0; count = 4; break; case PERIPH_ID_UART2: @@ -66,25 +66,25 @@ static int exynos5_mmc_config(int peripheral, int flags) struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); struct s5p_gpio_bank *bank, *bank_ext; - int i; + int i, start; switch (peripheral) { case PERIPH_ID_SDMMC0: bank = &gpio1->c0; bank_ext = &gpio1->c1; + start = 0; break; case PERIPH_ID_SDMMC1: - bank = &gpio1->c1; + bank = &gpio1->c2; bank_ext = NULL; break; case PERIPH_ID_SDMMC2: - bank = &gpio1->c2; - bank_ext = &gpio1->c3; - break; - case PERIPH_ID_SDMMC3: bank = &gpio1->c3; bank_ext = NULL; break; + case PERIPH_ID_SDMMC3: + debug("SDMMC3 not supported yet"); + return -1; } if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) { debug("SDMMC device %d does not support 8bit mode", @@ -92,7 +92,7 @@ static int exynos5_mmc_config(int peripheral, int flags) return -1; } if (flags & PINMUX_FLAG_8BIT_MODE) { - for (i = 3; i <= 6; i++) { + for (i = start; i <= (start + 3); i++) { s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP); s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);