From patchwork Tue May 8 10:12:01 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 157661 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5904AB6EEB for ; Tue, 8 May 2012 20:11:18 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F119A280A6; Tue, 8 May 2012 12:11:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id l3qO7LzSfACl; Tue, 8 May 2012 12:11:16 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 59A9E28095; Tue, 8 May 2012 12:11:14 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 32B622808D for ; Tue, 8 May 2012 12:11:10 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CsOAfomOJB7n for ; Tue, 8 May 2012 12:11:09 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) by theia.denx.de (Postfix) with ESMTP id 51BB6280A6 for ; Tue, 8 May 2012 12:11:07 +0200 (CEST) Received: from epcpsbgm2.samsung.com (mailout4.samsung.com [203.254.224.34]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M3P009K58AI6TC0@mailout4.samsung.com> for u-boot@lists.denx.de; Tue, 08 May 2012 19:11:06 +0900 (KST) X-AuditID: cbfee61b-b7c60ae000000c58-8a-4fa8f13a5876 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (MMPCPMTA) with SMTP id A6.76.03160.A31F8AF4; Tue, 08 May 2012 19:11:06 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M3P002KH87WVYL0@mmp2.samsung.com> for u-boot@lists.denx.de; Tue, 08 May 2012 19:11:06 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Tue, 08 May 2012 15:42:01 +0530 Message-id: <1336471922-19336-6-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1336471922-19336-1-git-send-email-rajeshwari.s@samsung.com> References: <1336471922-19336-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: AAAAAA== X-TM-AS-MML: No Cc: marex@denx.de, k.chander@samsung.com, patches@linaro.org, gautam.vivek@samsung.com Subject: [U-Boot] [PATCH 5/6 V3] EXYNOS5: USB: Fix incorrect USB base addresses X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch corrects the base addresses for USB_PHY and USB_OTG. Signed-off-by: Vivek Gautam Signed-off-by: Rajeshwari Shinde Acked-by: Chander Kashyap Acked-by: Minkyu Kang --- arch/arm/include/asm/arch-exynos/cpu.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 85d421d..8d5d2b5 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -70,10 +70,10 @@ #define EXYNOS5_GPIO_PART1_BASE 0x11400000 #define EXYNOS5_MIPI_DSIM_BASE 0x11D00000 #define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000 +#define EXYNOS5_USBPHY_BASE 0x12130000 +#define EXYNOS5_USBOTG_BASE 0x12140000 #define EXYNOS5_MMC_BASE 0x12200000 #define EXYNOS5_SROMC_BASE 0x12250000 -#define EXYNOS5_USBOTG_BASE 0x12480000 -#define EXYNOS5_USBPHY_BASE 0x12480000 #define EXYNOS5_UART_BASE 0x12C00000 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000 #define EXYNOS5_GPIO_PART2_BASE 0x13400000