From patchwork Tue Apr 17 18:50:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 153271 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F3DCDB70CE for ; Wed, 18 Apr 2012 04:50:56 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1414A280AA; Tue, 17 Apr 2012 20:50:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id j9PvNaprQRRQ; Tue, 17 Apr 2012 20:50:54 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8053428091; Tue, 17 Apr 2012 20:50:49 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6B6142807F for ; Tue, 17 Apr 2012 20:50:46 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id T7Q4slFGALCm for ; Tue, 17 Apr 2012 20:50:46 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yw0-f74.google.com (mail-yw0-f74.google.com [209.85.213.74]) by theia.denx.de (Postfix) with ESMTPS id E42352807D for ; Tue, 17 Apr 2012 20:50:45 +0200 (CEST) Received: by mail-yw0-f74.google.com with SMTP id m50so794201yhg.3 for ; Tue, 17 Apr 2012 11:50:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=cZBSeEQ8RC7bIHkIr2A2d12AN0/PC3y+MLmO9+xC2ng=; b=I+ssDsOuAhZJteDWdVOZeILzrJ4l0UzNnSVD+zVchhey2804t3cJuQPhA6yE7HmMbu FI8BKyPr/zk7tiY59YPnZ06wFXqvp37a2mc3KGS8Dmro6KVMJYGTlOpyDlzT8R/5GDON GiKPgmT7E30QxTeObgSr3sSp/4095IdKlX76dGsWTwNJVh42Ra23LCcqmxqkIIGqTby1 aXA+oGa6F92wtK4GaEXv5eyr+w0VnxhU/I9mmfucq2K6jtsvNzkQYksXxuqED3SGKmsD iRbHX5X6QXzOkpU2MtwtmwjkCfDsNQte7YsPvGhuwxWfN3vT5JMT2SbI44r57cowZMcy i9ww== Received: by 10.101.7.34 with SMTP id k34mr5517602ani.15.1334688645565; Tue, 17 Apr 2012 11:50:45 -0700 (PDT) Received: by 10.101.7.34 with SMTP id k34mr5517580ani.15.1334688645405; Tue, 17 Apr 2012 11:50:45 -0700 (PDT) Received: from wpzn3.hot.corp.google.com (216-239-44-65.google.com [216.239.44.65]) by gmr-mx.google.com with ESMTPS id y53si20353978yhe.4.2012.04.17.11.50.45 (version=TLSv1/SSLv3 cipher=AES128-SHA); Tue, 17 Apr 2012 11:50:45 -0700 (PDT) Received: from sglass.mtv.corp.google.com (dhcp-172-22-162-38.mtv.corp.google.com [172.22.162.38]) by wpzn3.hot.corp.google.com (Postfix) with ESMTP id 4D49510004D; Tue, 17 Apr 2012 11:50:45 -0700 (PDT) Received: by sglass.mtv.corp.google.com (Postfix, from userid 121222) id 0DFBA140ED3; Tue, 17 Apr 2012 11:50:44 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Tue, 17 Apr 2012 11:50:08 -0700 Message-Id: <1334688614-4977-2-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1334688614-4977-1-git-send-email-sjg@chromium.org> References: <1334688614-4977-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQmOIdsyvGU9iUfaLfb19LeyEp1KEKZLOJDgsJ1632vUC1hsz1RvH+kAUh0mL7SRsJWD0p8I/DOHdGZgneKastPfqQ8ipWF9pfR01Gfhrm/6dAA6XCuH8tHsIfdjp/PvN5iFVhSN6hZv+RVHIJDxjEJEVUpj9sC4/AwPPVM1gOAoyzaqNX8= Cc: Scott Wood , Tom Warren Subject: [U-Boot] [PATCH v3 1/7] nand: Try to align the default buffers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass --- Changes in v2: - Add new patch to align default buffers in nand_base drivers/mtd/nand/nand_base.c | 3 ++- include/linux/mtd/nand.h | 7 ++++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 44f7b91..7bfc29e 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2935,7 +2935,8 @@ int nand_scan_tail(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; if (!(chip->options & NAND_OWN_BUFFERS)) - chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL); + chip->buffers = memalign(ARCH_DMA_MINALIGN, + sizeof(*chip->buffers)); if (!chip->buffers) return -ENOMEM; diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index da6fa18..ae0bdf6 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -391,9 +391,10 @@ struct nand_ecc_ctrl { * consecutive order. */ struct nand_buffers { - uint8_t ecccalc[NAND_MAX_OOBSIZE]; - uint8_t ecccode[NAND_MAX_OOBSIZE]; - uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE]; + uint8_t ecccalc[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)]; + uint8_t ecccode[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)]; + uint8_t databuf[ALIGN(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE, + ARCH_DMA_MINALIGN)]; }; /**