| Message ID | 1321524246-5187-3-git-send-email-thierry.reding@avionic-design.de |
|---|---|
| State | Accepted |
| Headers | show |
On Thu, Nov 17, 2011 at 2:04 AM, Thierry Reding <thierry.reding@avionic-design.de> wrote: > NVIDIA's flashing tools assume that the bootloader is loaded at address > 0x00108000. Instead of requiring non-standard builds of those tools > which allow a load address of 0x00E08000, this commit just switches all > Tegra2 boards to use the standard load address. > > Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> > Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> > --- > include/configs/tegra2-common.h | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h > index e233b1c..f7b6232 100644 > --- a/include/configs/tegra2-common.h > +++ b/include/configs/tegra2-common.h > @@ -152,7 +152,7 @@ > #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 > #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ > > -#define CONFIG_SYS_TEXT_BASE 0x00E08000 > +#define CONFIG_SYS_TEXT_BASE 0x00108000 > #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 > > #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE > -- > 1.7.7.3 > >
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index e233b1c..f7b6232 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -152,7 +152,7 @@ #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_TEXT_BASE 0x00E08000 +#define CONFIG_SYS_TEXT_BASE 0x00108000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE