From patchwork Mon Oct 3 19:18:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: York Sun X-Patchwork-Id: 117497 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F13E7B6F75 for ; Tue, 4 Oct 2011 06:21:43 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A8BFC281FC; Mon, 3 Oct 2011 21:21:42 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IiGuBYDqT+e1; Mon, 3 Oct 2011 21:21:42 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D15322820B; Mon, 3 Oct 2011 21:21:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4C48F28204 for ; Mon, 3 Oct 2011 21:21:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HS8GlSJA6-fT for ; Mon, 3 Oct 2011 21:21:38 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from TX2EHSOBE006.bigfish.com (tx2ehsobe003.messaging.microsoft.com [65.55.88.13]) by theia.denx.de (Postfix) with ESMTPS id 577F0281FC for ; Mon, 3 Oct 2011 21:21:38 +0200 (CEST) Received: from mail151-tx2-R.bigfish.com (10.9.14.249) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 14.1.225.22; Mon, 3 Oct 2011 19:21:35 +0000 Received: from mail151-tx2 (localhost.localdomain [127.0.0.1]) by mail151-tx2-R.bigfish.com (Postfix) with ESMTP id 95DC1D381CC for ; Mon, 3 Oct 2011 19:21:35 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 0,13, Received: from mail151-tx2 (localhost.localdomain [127.0.0.1]) by mail151-tx2 (MessageSwitch) id 1317669622793481_11939; Mon, 3 Oct 2011 19:20:22 +0000 (UTC) Received: from TX2EHSMHS036.bigfish.com (unknown [10.9.14.252]) by mail151-tx2.bigfish.com (Postfix) with ESMTP id D6248ED8564 for ; Mon, 3 Oct 2011 19:18:47 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS036.bigfish.com (10.9.99.136) with Microsoft SMTP Server (TLS) id 14.1.225.22; Mon, 3 Oct 2011 19:18:45 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.323.7; Mon, 3 Oct 2011 14:18:45 -0500 Received: from localhost.localdomain ([10.214.82.129]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p93JIgLv016701; Mon, 3 Oct 2011 14:18:44 -0500 (CDT) From: York Sun To: Date: Mon, 3 Oct 2011 12:18:40 -0700 Message-ID: <1317669522-19756-2-git-send-email-yorksun@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1317669522-19756-1-git-send-email-yorksun@freescale.com> References: <1317669522-19756-1-git-send-email-yorksun@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH 2/4] powerpc/mpc8536ds: Invert SDHC_WP pin polarity X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Xie Xiaobo MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write protected pin polarity does not follow the SD card standard in MPC8536 Rev 1.0 silicon. The MPC8536DS board invert the SDHC_WP pin as a workaround. However, This silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board. Signed-off-by: Xie Xiaobo --- board/freescale/mpc8536ds/mpc8536ds.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 2beea34..c9f85c8 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -51,6 +51,14 @@ int board_early_init_f (void) setbits_be32(&gur->pmuxcr, (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); + + /* The MPC8536DS board insert the SDHC_WP pin for erratum NMG_eSDHC118, + * however, this erratum only applies to MPC8536 Rev1.0. + * So set SDHC_WP to active-low when use MPC8536 Rev1.1 and greater.*/ + if ((((SVR_MAJ(get_svr()) & 0x7) == 0x1) && + (SVR_MIN(get_svr()) >= 0x1)) + || (SVR_MAJ(get_svr() & 0x7) > 0x1)) + setbits_be32(&gur->gencfgr, MPC85xx_GENCFGR_SDHC_WP_INV); #endif return 0; }