From patchwork Tue Sep 13 07:10:12 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 114448 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B42A8B70C7 for ; Tue, 13 Sep 2011 17:14:05 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 420EF281FE; Tue, 13 Sep 2011 09:13:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CJhpg329ktTv; Tue, 13 Sep 2011 09:13:18 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AA9ED282CA; Tue, 13 Sep 2011 09:11:37 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 714CA28262 for ; Tue, 13 Sep 2011 09:11:30 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OchMdWXfwdjH for ; Tue, 13 Sep 2011 09:11:28 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bw0-f44.google.com (mail-bw0-f44.google.com [209.85.214.44]) by theia.denx.de (Postfix) with ESMTPS id 83A75282C8 for ; Tue, 13 Sep 2011 09:10:56 +0200 (CEST) Received: by mail-bw0-f44.google.com with SMTP id q10so194975bka.3 for ; Tue, 13 Sep 2011 00:10:56 -0700 (PDT) Received: by 10.204.9.194 with SMTP id m2mr632403bkm.153.1315897856585; Tue, 13 Sep 2011 00:10:56 -0700 (PDT) Received: from localhost ([178.23.216.97]) by mx.google.com with ESMTPS id i5sm462003bkd.0.2011.09.13.00.10.55 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 13 Sep 2011 00:10:56 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de Date: Tue, 13 Sep 2011 09:10:12 +0200 Message-Id: <1315897821-23049-18-git-send-email-monstr@monstr.eu> X-Mailer: git-send-email 1.5.5.1 In-Reply-To: <1315897821-23049-17-git-send-email-monstr@monstr.eu> References: <1315897821-23049-1-git-send-email-monstr@monstr.eu> <1315897821-23049-2-git-send-email-monstr@monstr.eu> <1315897821-23049-3-git-send-email-monstr@monstr.eu> <1315897821-23049-4-git-send-email-monstr@monstr.eu> <1315897821-23049-5-git-send-email-monstr@monstr.eu> <1315897821-23049-6-git-send-email-monstr@monstr.eu> <1315897821-23049-7-git-send-email-monstr@monstr.eu> <1315897821-23049-8-git-send-email-monstr@monstr.eu> <1315897821-23049-9-git-send-email-monstr@monstr.eu> <1315897821-23049-10-git-send-email-monstr@monstr.eu> <1315897821-23049-11-git-send-email-monstr@monstr.eu> <1315897821-23049-12-git-send-email-monstr@monstr.eu> <1315897821-23049-13-git-send-email-monstr@monstr.eu> <1315897821-23049-14-git-send-email-monstr@monstr.eu> <1315897821-23049-15-git-send-email-monstr@monstr.eu> <1315897821-23049-16-git-send-email-monstr@monstr.eu> <1315897821-23049-17-git-send-email-monstr@monstr.eu> Subject: [U-Boot] [PATCH 17/26] microblaze: Setup MB vectors if feature is enable for u-boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de For example: Setup reset vectors if reset address is setup. Setup user exception vector if user exception is enabled Signed-off-by: Michal Simek --- arch/microblaze/cpu/start.S | 34 ++++++++++++++++++++++------------ 1 files changed, 22 insertions(+), 12 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index d3370c4..17c0e28 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -30,6 +30,13 @@ .text .global _start _start: + /* + * reserve registers: + * r10: Stores little/big endian offset for vectors + * r2: Stores imm opcode + * r3: Stores brai opcode + */ + mts rmsr, r0 /* disable cache */ addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ @@ -47,21 +54,15 @@ _start: swi r6, r0, 0 lbui r10, r0, 0 - /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ - swi r6, r0, 0x0 /* reset address */ - swi r6, r0, 0x8 /* user vector exception */ - swi r6, r0, 0x10 /* interrupt */ - swi r6, r0, 0x20 /* hardware exception */ - - addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ - swi r6, r0, 0x4 /* reset address */ - swi r6, r0, 0xC /* user vector exception */ - swi r6, r0, 0x14 /* interrupt */ - swi r6, r0, 0x24 /* hardware exception */ + /* add opcode instruction for 32bit jump - 2 instruction imm & brai */ + addi r2, r0, 0xb0000000 /* hex b000 opcode imm */ + addi r3, r0, 0xb8080000 /* hew b808 opcode brai */ #ifdef CONFIG_SYS_RESET_ADDRESS /* reset address */ + swi r2, r0, 0x0 /* reset address - imm opcode */ + swi r3, r0, 0x4 /* reset address - brai opcode */ + addik r6, r0, CONFIG_SYS_RESET_ADDRESS sw r6, r1, r0 lhu r7, r1, r0 @@ -88,6 +89,9 @@ _start: #ifdef CONFIG_SYS_USR_EXCEP /* user_vector_exception */ + swi r2, r0, 0x8 /* user vector exception - imm opcode */ + swi r3, r0, 0xC /* user vector exception - brai opcode */ + addik r6, r0, _exception_handler sw r6, r1, r0 /* @@ -119,6 +123,9 @@ _start: #ifdef CONFIG_SYS_INTC_0 /* interrupt_handler */ + swi r2, r0, 0x10 /* interrupt - imm opcode */ + swi r3, r0, 0x14 /* interrupt - brai opcode */ + addik r6, r0, _interrupt_handler sw r6, r1, r0 lhu r7, r1, r10 @@ -129,6 +136,9 @@ _start: #endif /* hardware exception */ + swi r2, r0, 0x20 /* hardware exception - imm opcode */ + swi r3, r0, 0x24 /* hardware exception - brai opcode */ + addik r6, r0, _hw_exception_handler sw r6, r1, r0 lhu r7, r1, r10